18c2ecf20Sopenharmony_ciFreescale i.MX DRM master device
28c2ecf20Sopenharmony_ci================================
38c2ecf20Sopenharmony_ci
48c2ecf20Sopenharmony_ciThe freescale i.MX DRM master device is a virtual device needed to list all
58c2ecf20Sopenharmony_ciIPU or other display interface nodes that comprise the graphics subsystem.
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_ciRequired properties:
88c2ecf20Sopenharmony_ci- compatible: Should be "fsl,imx-display-subsystem"
98c2ecf20Sopenharmony_ci- ports: Should contain a list of phandles pointing to display interface ports
108c2ecf20Sopenharmony_ci  of IPU devices
118c2ecf20Sopenharmony_ci
128c2ecf20Sopenharmony_ciexample:
138c2ecf20Sopenharmony_ci
148c2ecf20Sopenharmony_cidisplay-subsystem {
158c2ecf20Sopenharmony_ci	compatible = "fsl,display-subsystem";
168c2ecf20Sopenharmony_ci	ports = <&ipu_di0>;
178c2ecf20Sopenharmony_ci};
188c2ecf20Sopenharmony_ci
198c2ecf20Sopenharmony_ci
208c2ecf20Sopenharmony_ciFreescale i.MX IPUv3
218c2ecf20Sopenharmony_ci====================
228c2ecf20Sopenharmony_ci
238c2ecf20Sopenharmony_ciRequired properties:
248c2ecf20Sopenharmony_ci- compatible: Should be "fsl,<chip>-ipu" where <chip> is one of
258c2ecf20Sopenharmony_ci  - imx51
268c2ecf20Sopenharmony_ci  - imx53
278c2ecf20Sopenharmony_ci  - imx6q
288c2ecf20Sopenharmony_ci  - imx6qp
298c2ecf20Sopenharmony_ci- reg: should be register base and length as documented in the
308c2ecf20Sopenharmony_ci  datasheet
318c2ecf20Sopenharmony_ci- interrupts: Should contain sync interrupt and error interrupt,
328c2ecf20Sopenharmony_ci  in this order.
338c2ecf20Sopenharmony_ci- resets: phandle pointing to the system reset controller and
348c2ecf20Sopenharmony_ci          reset line index, see reset/fsl,imx-src.txt for details
358c2ecf20Sopenharmony_ciAdditional required properties for fsl,imx6qp-ipu:
368c2ecf20Sopenharmony_ci- fsl,prg: phandle to prg node associated with this IPU instance
378c2ecf20Sopenharmony_ciOptional properties:
388c2ecf20Sopenharmony_ci- port@[0-3]: Port nodes with endpoint definitions as defined in
398c2ecf20Sopenharmony_ci  Documentation/devicetree/bindings/media/video-interfaces.txt.
408c2ecf20Sopenharmony_ci  Ports 0 and 1 should correspond to CSI0 and CSI1,
418c2ecf20Sopenharmony_ci  ports 2 and 3 should correspond to DI0 and DI1, respectively.
428c2ecf20Sopenharmony_ci
438c2ecf20Sopenharmony_ciexample:
448c2ecf20Sopenharmony_ci
458c2ecf20Sopenharmony_ciipu: ipu@18000000 {
468c2ecf20Sopenharmony_ci	#address-cells = <1>;
478c2ecf20Sopenharmony_ci	#size-cells = <0>;
488c2ecf20Sopenharmony_ci	compatible = "fsl,imx53-ipu";
498c2ecf20Sopenharmony_ci	reg = <0x18000000 0x080000000>;
508c2ecf20Sopenharmony_ci	interrupts = <11 10>;
518c2ecf20Sopenharmony_ci	resets = <&src 2>;
528c2ecf20Sopenharmony_ci
538c2ecf20Sopenharmony_ci	ipu_di0: port@2 {
548c2ecf20Sopenharmony_ci		reg = <2>;
558c2ecf20Sopenharmony_ci
568c2ecf20Sopenharmony_ci		ipu_di0_disp0: endpoint {
578c2ecf20Sopenharmony_ci			remote-endpoint = <&display_in>;
588c2ecf20Sopenharmony_ci		};
598c2ecf20Sopenharmony_ci	};
608c2ecf20Sopenharmony_ci};
618c2ecf20Sopenharmony_ci
628c2ecf20Sopenharmony_ciFreescale i.MX PRE (Prefetch Resolve Engine)
638c2ecf20Sopenharmony_ci============================================
648c2ecf20Sopenharmony_ci
658c2ecf20Sopenharmony_ciRequired properties:
668c2ecf20Sopenharmony_ci- compatible: should be "fsl,imx6qp-pre"
678c2ecf20Sopenharmony_ci- reg: should be register base and length as documented in the
688c2ecf20Sopenharmony_ci  datasheet
698c2ecf20Sopenharmony_ci- clocks : phandle to the PRE axi clock input, as described
708c2ecf20Sopenharmony_ci  in Documentation/devicetree/bindings/clock/clock-bindings.txt and
718c2ecf20Sopenharmony_ci  Documentation/devicetree/bindings/clock/imx6q-clock.yaml.
728c2ecf20Sopenharmony_ci- clock-names: should be "axi"
738c2ecf20Sopenharmony_ci- interrupts: should contain the PRE interrupt
748c2ecf20Sopenharmony_ci- fsl,iram: phandle pointing to the mmio-sram device node, that should be
758c2ecf20Sopenharmony_ci  used for the PRE SRAM double buffer.
768c2ecf20Sopenharmony_ci
778c2ecf20Sopenharmony_ciexample:
788c2ecf20Sopenharmony_ci
798c2ecf20Sopenharmony_cipre@21c8000 {
808c2ecf20Sopenharmony_ci	compatible = "fsl,imx6qp-pre";
818c2ecf20Sopenharmony_ci	reg = <0x021c8000 0x1000>;
828c2ecf20Sopenharmony_ci	interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
838c2ecf20Sopenharmony_ci	clocks = <&clks IMX6QDL_CLK_PRE0>;
848c2ecf20Sopenharmony_ci	clock-names = "axi";
858c2ecf20Sopenharmony_ci	fsl,iram = <&ocram2>;
868c2ecf20Sopenharmony_ci};
878c2ecf20Sopenharmony_ci
888c2ecf20Sopenharmony_ciFreescale i.MX PRG (Prefetch Resolve Gasket)
898c2ecf20Sopenharmony_ci============================================
908c2ecf20Sopenharmony_ci
918c2ecf20Sopenharmony_ciRequired properties:
928c2ecf20Sopenharmony_ci- compatible: should be "fsl,imx6qp-prg"
938c2ecf20Sopenharmony_ci- reg: should be register base and length as documented in the
948c2ecf20Sopenharmony_ci  datasheet
958c2ecf20Sopenharmony_ci- clocks : phandles to the PRG ipg and axi clock inputs, as described
968c2ecf20Sopenharmony_ci  in Documentation/devicetree/bindings/clock/clock-bindings.txt and
978c2ecf20Sopenharmony_ci  Documentation/devicetree/bindings/clock/imx6q-clock.yaml.
988c2ecf20Sopenharmony_ci- clock-names: should be "ipg" and "axi"
998c2ecf20Sopenharmony_ci- fsl,pres: phandles to the PRE units attached to this PRG, with the fixed
1008c2ecf20Sopenharmony_ci  PRE as the first entry and the muxable PREs following.
1018c2ecf20Sopenharmony_ci
1028c2ecf20Sopenharmony_ciexample:
1038c2ecf20Sopenharmony_ci
1048c2ecf20Sopenharmony_ciprg@21cc000 {
1058c2ecf20Sopenharmony_ci	compatible = "fsl,imx6qp-prg";
1068c2ecf20Sopenharmony_ci	reg = <0x021cc000 0x1000>;
1078c2ecf20Sopenharmony_ci	clocks = <&clks IMX6QDL_CLK_PRG0_APB>,
1088c2ecf20Sopenharmony_ci		 <&clks IMX6QDL_CLK_PRG0_AXI>;
1098c2ecf20Sopenharmony_ci	clock-names = "ipg", "axi";
1108c2ecf20Sopenharmony_ci	fsl,pres = <&pre1>, <&pre2>, <&pre3>;
1118c2ecf20Sopenharmony_ci};
1128c2ecf20Sopenharmony_ci
1138c2ecf20Sopenharmony_ciParallel display support
1148c2ecf20Sopenharmony_ci========================
1158c2ecf20Sopenharmony_ci
1168c2ecf20Sopenharmony_ciRequired properties:
1178c2ecf20Sopenharmony_ci- compatible: Should be "fsl,imx-parallel-display"
1188c2ecf20Sopenharmony_ciOptional properties:
1198c2ecf20Sopenharmony_ci- interface-pix-fmt: How this display is connected to the
1208c2ecf20Sopenharmony_ci  display interface. Currently supported types: "rgb24", "rgb565", "bgr666"
1218c2ecf20Sopenharmony_ci  and "lvds666".
1228c2ecf20Sopenharmony_ci- edid: verbatim EDID data block describing attached display.
1238c2ecf20Sopenharmony_ci- ddc: phandle describing the i2c bus handling the display data
1248c2ecf20Sopenharmony_ci  channel
1258c2ecf20Sopenharmony_ci- port@[0-1]: Port nodes with endpoint definitions as defined in
1268c2ecf20Sopenharmony_ci  Documentation/devicetree/bindings/media/video-interfaces.txt.
1278c2ecf20Sopenharmony_ci  Port 0 is the input port connected to the IPU display interface,
1288c2ecf20Sopenharmony_ci  port 1 is the output port connected to a panel.
1298c2ecf20Sopenharmony_ci
1308c2ecf20Sopenharmony_ciexample:
1318c2ecf20Sopenharmony_ci
1328c2ecf20Sopenharmony_cidisp0 {
1338c2ecf20Sopenharmony_ci	compatible = "fsl,imx-parallel-display";
1348c2ecf20Sopenharmony_ci	edid = [edid-data];
1358c2ecf20Sopenharmony_ci	interface-pix-fmt = "rgb24";
1368c2ecf20Sopenharmony_ci
1378c2ecf20Sopenharmony_ci	port@0 {
1388c2ecf20Sopenharmony_ci		reg = <0>;
1398c2ecf20Sopenharmony_ci
1408c2ecf20Sopenharmony_ci		display_in: endpoint {
1418c2ecf20Sopenharmony_ci			remote-endpoint = <&ipu_di0_disp0>;
1428c2ecf20Sopenharmony_ci		};
1438c2ecf20Sopenharmony_ci	};
1448c2ecf20Sopenharmony_ci
1458c2ecf20Sopenharmony_ci	port@1 {
1468c2ecf20Sopenharmony_ci		reg = <1>;
1478c2ecf20Sopenharmony_ci
1488c2ecf20Sopenharmony_ci		display_out: endpoint {
1498c2ecf20Sopenharmony_ci			remote-endpoint = <&panel_in>;
1508c2ecf20Sopenharmony_ci		};
1518c2ecf20Sopenharmony_ci	};
1528c2ecf20Sopenharmony_ci};
1538c2ecf20Sopenharmony_ci
1548c2ecf20Sopenharmony_cipanel {
1558c2ecf20Sopenharmony_ci	...
1568c2ecf20Sopenharmony_ci
1578c2ecf20Sopenharmony_ci	port {
1588c2ecf20Sopenharmony_ci		panel_in: endpoint {
1598c2ecf20Sopenharmony_ci			remote-endpoint = <&display_out>;
1608c2ecf20Sopenharmony_ci		};
1618c2ecf20Sopenharmony_ci	};
1628c2ecf20Sopenharmony_ci};
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