18c2ecf20Sopenharmony_ciExynos MIPI DSI Master
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ciRequired properties:
48c2ecf20Sopenharmony_ci  - compatible: value should be one of the following
58c2ecf20Sopenharmony_ci		"samsung,exynos3250-mipi-dsi" /* for Exynos3250/3472 SoCs */
68c2ecf20Sopenharmony_ci		"samsung,exynos4210-mipi-dsi" /* for Exynos4 SoCs */
78c2ecf20Sopenharmony_ci		"samsung,exynos5410-mipi-dsi" /* for Exynos5410/5420/5440 SoCs */
88c2ecf20Sopenharmony_ci		"samsung,exynos5422-mipi-dsi" /* for Exynos5422/5800 SoCs */
98c2ecf20Sopenharmony_ci		"samsung,exynos5433-mipi-dsi" /* for Exynos5433 SoCs */
108c2ecf20Sopenharmony_ci  - reg: physical base address and length of the registers set for the device
118c2ecf20Sopenharmony_ci  - interrupts: should contain DSI interrupt
128c2ecf20Sopenharmony_ci  - clocks: list of clock specifiers, must contain an entry for each required
138c2ecf20Sopenharmony_ci    entry in clock-names
148c2ecf20Sopenharmony_ci  - clock-names: should include "bus_clk"and "sclk_mipi" entries
158c2ecf20Sopenharmony_ci		 the use of "pll_clk" is deprecated
168c2ecf20Sopenharmony_ci  - phys: list of phy specifiers, must contain an entry for each required
178c2ecf20Sopenharmony_ci    entry in phy-names
188c2ecf20Sopenharmony_ci  - phy-names: should include "dsim" entry
198c2ecf20Sopenharmony_ci  - vddcore-supply: MIPI DSIM Core voltage supply (e.g. 1.1V)
208c2ecf20Sopenharmony_ci  - vddio-supply: MIPI DSIM I/O and PLL voltage supply (e.g. 1.8V)
218c2ecf20Sopenharmony_ci  - samsung,pll-clock-frequency: specifies frequency of the oscillator clock
228c2ecf20Sopenharmony_ci  - #address-cells, #size-cells: should be set respectively to <1> and <0>
238c2ecf20Sopenharmony_ci    according to DSI host bindings (see MIPI DSI bindings [1])
248c2ecf20Sopenharmony_ci  - samsung,burst-clock-frequency: specifies DSI frequency in high-speed burst
258c2ecf20Sopenharmony_ci    mode
268c2ecf20Sopenharmony_ci  - samsung,esc-clock-frequency: specifies DSI frequency in escape mode
278c2ecf20Sopenharmony_ci
288c2ecf20Sopenharmony_ciOptional properties:
298c2ecf20Sopenharmony_ci  - power-domains: a phandle to DSIM power domain node
308c2ecf20Sopenharmony_ci
318c2ecf20Sopenharmony_ciChild nodes:
328c2ecf20Sopenharmony_ci  Should contain DSI peripheral nodes (see MIPI DSI bindings [1]).
338c2ecf20Sopenharmony_ci
348c2ecf20Sopenharmony_ciVideo interfaces:
358c2ecf20Sopenharmony_ci  Device node can contain following video interface port nodes according to [2]:
368c2ecf20Sopenharmony_ci  0: RGB input,
378c2ecf20Sopenharmony_ci  1: DSI output
388c2ecf20Sopenharmony_ci
398c2ecf20Sopenharmony_ci[1]: Documentation/devicetree/bindings/display/mipi-dsi-bus.txt
408c2ecf20Sopenharmony_ci[2]: Documentation/devicetree/bindings/media/video-interfaces.txt
418c2ecf20Sopenharmony_ci
428c2ecf20Sopenharmony_ciExample:
438c2ecf20Sopenharmony_ci
448c2ecf20Sopenharmony_ci	dsi@11c80000 {
458c2ecf20Sopenharmony_ci		compatible = "samsung,exynos4210-mipi-dsi";
468c2ecf20Sopenharmony_ci		reg = <0x11C80000 0x10000>;
478c2ecf20Sopenharmony_ci		interrupts = <0 79 0>;
488c2ecf20Sopenharmony_ci		clocks = <&clock 286>, <&clock 143>;
498c2ecf20Sopenharmony_ci		clock-names = "bus_clk", "sclk_mipi";
508c2ecf20Sopenharmony_ci		phys = <&mipi_phy 1>;
518c2ecf20Sopenharmony_ci		phy-names = "dsim";
528c2ecf20Sopenharmony_ci		vddcore-supply = <&vusb_reg>;
538c2ecf20Sopenharmony_ci		vddio-supply = <&vmipi_reg>;
548c2ecf20Sopenharmony_ci		power-domains = <&pd_lcd0>;
558c2ecf20Sopenharmony_ci		#address-cells = <1>;
568c2ecf20Sopenharmony_ci		#size-cells = <0>;
578c2ecf20Sopenharmony_ci		samsung,pll-clock-frequency = <24000000>;
588c2ecf20Sopenharmony_ci
598c2ecf20Sopenharmony_ci		panel@1 {
608c2ecf20Sopenharmony_ci			reg = <0>;
618c2ecf20Sopenharmony_ci			...
628c2ecf20Sopenharmony_ci			port {
638c2ecf20Sopenharmony_ci				panel_ep: endpoint {
648c2ecf20Sopenharmony_ci					remote-endpoint = <&dsi_ep>;
658c2ecf20Sopenharmony_ci				};
668c2ecf20Sopenharmony_ci			};
678c2ecf20Sopenharmony_ci		};
688c2ecf20Sopenharmony_ci
698c2ecf20Sopenharmony_ci		ports {
708c2ecf20Sopenharmony_ci			#address-cells = <1>;
718c2ecf20Sopenharmony_ci			#size-cells = <0>;
728c2ecf20Sopenharmony_ci
738c2ecf20Sopenharmony_ci			port@0 {
748c2ecf20Sopenharmony_ci				reg = <0>;
758c2ecf20Sopenharmony_ci				decon_to_mic: endpoint {
768c2ecf20Sopenharmony_ci					remote-endpoint = <&mic_to_decon>;
778c2ecf20Sopenharmony_ci				};
788c2ecf20Sopenharmony_ci			};
798c2ecf20Sopenharmony_ci
808c2ecf20Sopenharmony_ci			port@1 {
818c2ecf20Sopenharmony_ci				reg = <1>;
828c2ecf20Sopenharmony_ci				dsi_ep: endpoint {
838c2ecf20Sopenharmony_ci					reg = <0>;
848c2ecf20Sopenharmony_ci					samsung,burst-clock-frequency = <500000000>;
858c2ecf20Sopenharmony_ci					samsung,esc-clock-frequency = <20000000>;
868c2ecf20Sopenharmony_ci					remote-endpoint = <&panel_ep>;
878c2ecf20Sopenharmony_ci				};
888c2ecf20Sopenharmony_ci			};
898c2ecf20Sopenharmony_ci		};
908c2ecf20Sopenharmony_ci	};
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