18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
28c2ecf20Sopenharmony_ci%YAML 1.2
38c2ecf20Sopenharmony_ci---
48c2ecf20Sopenharmony_ci$id: http://devicetree.org/schemas/display/bridge/snps,dw-mipi-dsi.yaml#
58c2ecf20Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_cititle: Synopsys DesignWare MIPI DSI host controller
88c2ecf20Sopenharmony_ci
98c2ecf20Sopenharmony_cimaintainers:
108c2ecf20Sopenharmony_ci  - Philippe CORNU <philippe.cornu@st.com>
118c2ecf20Sopenharmony_ci
128c2ecf20Sopenharmony_cidescription: |
138c2ecf20Sopenharmony_ci  This document defines device tree properties for the Synopsys DesignWare MIPI
148c2ecf20Sopenharmony_ci  DSI host controller. It doesn't constitue a device tree binding specification
158c2ecf20Sopenharmony_ci  by itself but is meant to be referenced by platform-specific device tree
168c2ecf20Sopenharmony_ci  bindings.
178c2ecf20Sopenharmony_ci
188c2ecf20Sopenharmony_ci  When referenced from platform device tree bindings the properties defined in
198c2ecf20Sopenharmony_ci  this document are defined as follows. The platform device tree bindings are
208c2ecf20Sopenharmony_ci  responsible for defining whether each property is required or optional.
218c2ecf20Sopenharmony_ci
228c2ecf20Sopenharmony_ciallOf:
238c2ecf20Sopenharmony_ci  - $ref: ../dsi-controller.yaml#
248c2ecf20Sopenharmony_ci
258c2ecf20Sopenharmony_ciproperties:
268c2ecf20Sopenharmony_ci  reg:
278c2ecf20Sopenharmony_ci    maxItems: 1
288c2ecf20Sopenharmony_ci
298c2ecf20Sopenharmony_ci  clocks:
308c2ecf20Sopenharmony_ci    items:
318c2ecf20Sopenharmony_ci      - description: Module clock
328c2ecf20Sopenharmony_ci      - description: DSI bus clock for either AHB and APB
338c2ecf20Sopenharmony_ci      - description: Pixel clock for the DPI/RGB input
348c2ecf20Sopenharmony_ci    minItems: 2
358c2ecf20Sopenharmony_ci
368c2ecf20Sopenharmony_ci  clock-names:
378c2ecf20Sopenharmony_ci    items:
388c2ecf20Sopenharmony_ci      - const: ref
398c2ecf20Sopenharmony_ci      - const: pclk
408c2ecf20Sopenharmony_ci      - const: px_clk
418c2ecf20Sopenharmony_ci    minItems: 2
428c2ecf20Sopenharmony_ci
438c2ecf20Sopenharmony_ci  resets:
448c2ecf20Sopenharmony_ci    maxItems: 1
458c2ecf20Sopenharmony_ci
468c2ecf20Sopenharmony_ci  reset-names:
478c2ecf20Sopenharmony_ci    const: apb
488c2ecf20Sopenharmony_ci
498c2ecf20Sopenharmony_ci  ports:
508c2ecf20Sopenharmony_ci    type: object
518c2ecf20Sopenharmony_ci
528c2ecf20Sopenharmony_ci    properties:
538c2ecf20Sopenharmony_ci      port@0:
548c2ecf20Sopenharmony_ci        type: object
558c2ecf20Sopenharmony_ci        description: Input node to receive pixel data.
568c2ecf20Sopenharmony_ci      port@1:
578c2ecf20Sopenharmony_ci        type: object
588c2ecf20Sopenharmony_ci        description: DSI output node to panel.
598c2ecf20Sopenharmony_ci
608c2ecf20Sopenharmony_ci    required:
618c2ecf20Sopenharmony_ci      - port@0
628c2ecf20Sopenharmony_ci      - port@1
638c2ecf20Sopenharmony_ci
648c2ecf20Sopenharmony_cirequired:
658c2ecf20Sopenharmony_ci  - clock-names
668c2ecf20Sopenharmony_ci  - clocks
678c2ecf20Sopenharmony_ci  - ports
688c2ecf20Sopenharmony_ci  - reg
698c2ecf20Sopenharmony_ci
708c2ecf20Sopenharmony_ciadditionalProperties: true
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