18c2ecf20Sopenharmony_cisii902x HDMI bridge bindings 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciRequired properties: 48c2ecf20Sopenharmony_ci - compatible: "sil,sii9022" 58c2ecf20Sopenharmony_ci - reg: i2c address of the bridge 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ciOptional properties: 88c2ecf20Sopenharmony_ci - interrupts: describe the interrupt line used to inform the host 98c2ecf20Sopenharmony_ci about hotplug events. 108c2ecf20Sopenharmony_ci - reset-gpios: OF device-tree gpio specification for RST_N pin. 118c2ecf20Sopenharmony_ci - iovcc-supply: I/O Supply Voltage (1.8V or 3.3V) 128c2ecf20Sopenharmony_ci - cvcc12-supply: Digital Core Supply Voltage (1.2V) 138c2ecf20Sopenharmony_ci 148c2ecf20Sopenharmony_ci HDMI audio properties: 158c2ecf20Sopenharmony_ci - #sound-dai-cells: <0> or <1>. <0> if only i2s or spdif pin 168c2ecf20Sopenharmony_ci is wired, <1> if the both are wired. HDMI audio is 178c2ecf20Sopenharmony_ci configured only if this property is found. 188c2ecf20Sopenharmony_ci - sil,i2s-data-lanes: Array of up to 4 integers with values of 0-3 198c2ecf20Sopenharmony_ci Each integer indicates which i2s pin is connected to which 208c2ecf20Sopenharmony_ci audio fifo. The first integer selects i2s audio pin for the 218c2ecf20Sopenharmony_ci first audio fifo#0 (HDMI channels 1&2), second for fifo#1 228c2ecf20Sopenharmony_ci (HDMI channels 3&4), and so on. There is 4 fifos and 4 i2s 238c2ecf20Sopenharmony_ci pins (SD0 - SD3). Any i2s pin can be connected to any fifo, 248c2ecf20Sopenharmony_ci but there can be no gaps. E.g. an i2s pin must be mapped to 258c2ecf20Sopenharmony_ci fifo#0 and fifo#1 before mapping a channel to fifo#2. Default 268c2ecf20Sopenharmony_ci value is <0>, describing SD0 pin beiging routed to hdmi audio 278c2ecf20Sopenharmony_ci fifo #0. 288c2ecf20Sopenharmony_ci - clocks: phandle and clock specifier for each clock listed in 298c2ecf20Sopenharmony_ci the clock-names property 308c2ecf20Sopenharmony_ci - clock-names: "mclk" 318c2ecf20Sopenharmony_ci Describes SII902x MCLK input. MCLK can be used to produce 328c2ecf20Sopenharmony_ci HDMI audio CTS values. This property follows 338c2ecf20Sopenharmony_ci Documentation/devicetree/bindings/clock/clock-bindings.txt 348c2ecf20Sopenharmony_ci consumer binding. 358c2ecf20Sopenharmony_ci 368c2ecf20Sopenharmony_ci If HDMI audio is configured the sii902x device becomes an I2S 378c2ecf20Sopenharmony_ci and/or spdif audio codec component (e.g a digital audio sink), 388c2ecf20Sopenharmony_ci that can be used in configuring a full audio devices with 398c2ecf20Sopenharmony_ci simple-card or audio-graph-card binding. See their binding 408c2ecf20Sopenharmony_ci documents on how to describe the way the sii902x device is 418c2ecf20Sopenharmony_ci connected to the rest of the audio system: 428c2ecf20Sopenharmony_ci Documentation/devicetree/bindings/sound/simple-card.yaml 438c2ecf20Sopenharmony_ci Documentation/devicetree/bindings/sound/audio-graph-card.txt 448c2ecf20Sopenharmony_ci Note: In case of the audio-graph-card binding the used port 458c2ecf20Sopenharmony_ci index should be 3. 468c2ecf20Sopenharmony_ci 478c2ecf20Sopenharmony_ciOptional subnodes: 488c2ecf20Sopenharmony_ci - video input: this subnode can contain a video input port node 498c2ecf20Sopenharmony_ci to connect the bridge to a display controller output (See this 508c2ecf20Sopenharmony_ci documentation [1]). 518c2ecf20Sopenharmony_ci 528c2ecf20Sopenharmony_ci[1]: Documentation/devicetree/bindings/media/video-interfaces.txt 538c2ecf20Sopenharmony_ci 548c2ecf20Sopenharmony_ciExample: 558c2ecf20Sopenharmony_ci hdmi-bridge@39 { 568c2ecf20Sopenharmony_ci compatible = "sil,sii9022"; 578c2ecf20Sopenharmony_ci reg = <0x39>; 588c2ecf20Sopenharmony_ci reset-gpios = <&pioA 1 0>; 598c2ecf20Sopenharmony_ci iovcc-supply = <&v3v3_hdmi>; 608c2ecf20Sopenharmony_ci cvcc12-supply = <&v1v2_hdmi>; 618c2ecf20Sopenharmony_ci 628c2ecf20Sopenharmony_ci #sound-dai-cells = <0>; 638c2ecf20Sopenharmony_ci sil,i2s-data-lanes = < 0 1 2 >; 648c2ecf20Sopenharmony_ci clocks = <&mclk>; 658c2ecf20Sopenharmony_ci clock-names = "mclk"; 668c2ecf20Sopenharmony_ci 678c2ecf20Sopenharmony_ci ports { 688c2ecf20Sopenharmony_ci #address-cells = <1>; 698c2ecf20Sopenharmony_ci #size-cells = <0>; 708c2ecf20Sopenharmony_ci 718c2ecf20Sopenharmony_ci port@0 { 728c2ecf20Sopenharmony_ci reg = <0>; 738c2ecf20Sopenharmony_ci bridge_in: endpoint { 748c2ecf20Sopenharmony_ci remote-endpoint = <&dc_out>; 758c2ecf20Sopenharmony_ci }; 768c2ecf20Sopenharmony_ci }; 778c2ecf20Sopenharmony_ci }; 788c2ecf20Sopenharmony_ci }; 79