18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
28c2ecf20Sopenharmony_ci%YAML 1.2
38c2ecf20Sopenharmony_ci---
48c2ecf20Sopenharmony_ci$id: "http://devicetree.org/schemas/display/bridge/cdns,mhdp8546.yaml#"
58c2ecf20Sopenharmony_ci$schema: "http://devicetree.org/meta-schemas/core.yaml#"
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_cititle: Cadence MHDP8546 bridge
88c2ecf20Sopenharmony_ci
98c2ecf20Sopenharmony_cimaintainers:
108c2ecf20Sopenharmony_ci  - Swapnil Jakhade <sjakhade@cadence.com>
118c2ecf20Sopenharmony_ci  - Yuti Amonkar <yamonkar@cadence.com>
128c2ecf20Sopenharmony_ci
138c2ecf20Sopenharmony_ciproperties:
148c2ecf20Sopenharmony_ci  compatible:
158c2ecf20Sopenharmony_ci    enum:
168c2ecf20Sopenharmony_ci      - cdns,mhdp8546
178c2ecf20Sopenharmony_ci      - ti,j721e-mhdp8546
188c2ecf20Sopenharmony_ci
198c2ecf20Sopenharmony_ci  reg:
208c2ecf20Sopenharmony_ci    minItems: 1
218c2ecf20Sopenharmony_ci    maxItems: 2
228c2ecf20Sopenharmony_ci    items:
238c2ecf20Sopenharmony_ci      - description:
248c2ecf20Sopenharmony_ci          Register block of mhdptx apb registers up to PHY mapped area (AUX_CONFIG_P).
258c2ecf20Sopenharmony_ci          The AUX and PMA registers are not part of this range, they are instead
268c2ecf20Sopenharmony_ci          included in the associated PHY.
278c2ecf20Sopenharmony_ci      - description:
288c2ecf20Sopenharmony_ci          Register block for DSS_EDP0_INTG_CFG_VP registers in case of TI J7 SoCs.
298c2ecf20Sopenharmony_ci
308c2ecf20Sopenharmony_ci  reg-names:
318c2ecf20Sopenharmony_ci    minItems: 1
328c2ecf20Sopenharmony_ci    maxItems: 2
338c2ecf20Sopenharmony_ci    items:
348c2ecf20Sopenharmony_ci      - const: mhdptx
358c2ecf20Sopenharmony_ci      - const: j721e-intg
368c2ecf20Sopenharmony_ci
378c2ecf20Sopenharmony_ci  clocks:
388c2ecf20Sopenharmony_ci    maxItems: 1
398c2ecf20Sopenharmony_ci    description:
408c2ecf20Sopenharmony_ci      DP bridge clock, used by the IP to know how to translate a number of
418c2ecf20Sopenharmony_ci      clock cycles into a time (which is used to comply with DP standard timings
428c2ecf20Sopenharmony_ci      and delays).
438c2ecf20Sopenharmony_ci
448c2ecf20Sopenharmony_ci  phys:
458c2ecf20Sopenharmony_ci    maxItems: 1
468c2ecf20Sopenharmony_ci    description:
478c2ecf20Sopenharmony_ci      phandle to the DisplayPort PHY.
488c2ecf20Sopenharmony_ci
498c2ecf20Sopenharmony_ci  phy-names:
508c2ecf20Sopenharmony_ci    items:
518c2ecf20Sopenharmony_ci      - const: dpphy
528c2ecf20Sopenharmony_ci
538c2ecf20Sopenharmony_ci  power-domains:
548c2ecf20Sopenharmony_ci    maxItems: 1
558c2ecf20Sopenharmony_ci
568c2ecf20Sopenharmony_ci  interrupts:
578c2ecf20Sopenharmony_ci    maxItems: 1
588c2ecf20Sopenharmony_ci
598c2ecf20Sopenharmony_ci  ports:
608c2ecf20Sopenharmony_ci    type: object
618c2ecf20Sopenharmony_ci    description:
628c2ecf20Sopenharmony_ci      Ports as described in Documentation/devicetree/bindings/graph.txt.
638c2ecf20Sopenharmony_ci
648c2ecf20Sopenharmony_ci    properties:
658c2ecf20Sopenharmony_ci      '#address-cells':
668c2ecf20Sopenharmony_ci        const: 1
678c2ecf20Sopenharmony_ci
688c2ecf20Sopenharmony_ci      '#size-cells':
698c2ecf20Sopenharmony_ci        const: 0
708c2ecf20Sopenharmony_ci
718c2ecf20Sopenharmony_ci      port@0:
728c2ecf20Sopenharmony_ci        type: object
738c2ecf20Sopenharmony_ci        description:
748c2ecf20Sopenharmony_ci          First input port representing the DP bridge input.
758c2ecf20Sopenharmony_ci
768c2ecf20Sopenharmony_ci      port@1:
778c2ecf20Sopenharmony_ci        type: object
788c2ecf20Sopenharmony_ci        description:
798c2ecf20Sopenharmony_ci          Second input port representing the DP bridge input.
808c2ecf20Sopenharmony_ci
818c2ecf20Sopenharmony_ci      port@2:
828c2ecf20Sopenharmony_ci        type: object
838c2ecf20Sopenharmony_ci        description:
848c2ecf20Sopenharmony_ci          Third input port representing the DP bridge input.
858c2ecf20Sopenharmony_ci
868c2ecf20Sopenharmony_ci      port@3:
878c2ecf20Sopenharmony_ci        type: object
888c2ecf20Sopenharmony_ci        description:
898c2ecf20Sopenharmony_ci          Fourth input port representing the DP bridge input.
908c2ecf20Sopenharmony_ci
918c2ecf20Sopenharmony_ci      port@4:
928c2ecf20Sopenharmony_ci        type: object
938c2ecf20Sopenharmony_ci        description:
948c2ecf20Sopenharmony_ci          Output port representing the DP bridge output.
958c2ecf20Sopenharmony_ci
968c2ecf20Sopenharmony_ci    required:
978c2ecf20Sopenharmony_ci      - port@0
988c2ecf20Sopenharmony_ci      - port@4
998c2ecf20Sopenharmony_ci      - '#address-cells'
1008c2ecf20Sopenharmony_ci      - '#size-cells'
1018c2ecf20Sopenharmony_ci
1028c2ecf20Sopenharmony_ciallOf:
1038c2ecf20Sopenharmony_ci  - if:
1048c2ecf20Sopenharmony_ci      properties:
1058c2ecf20Sopenharmony_ci        compatible:
1068c2ecf20Sopenharmony_ci          contains:
1078c2ecf20Sopenharmony_ci            const: ti,j721e-mhdp8546
1088c2ecf20Sopenharmony_ci    then:
1098c2ecf20Sopenharmony_ci      properties:
1108c2ecf20Sopenharmony_ci        reg:
1118c2ecf20Sopenharmony_ci          minItems: 2
1128c2ecf20Sopenharmony_ci        reg-names:
1138c2ecf20Sopenharmony_ci          minItems: 2
1148c2ecf20Sopenharmony_ci    else:
1158c2ecf20Sopenharmony_ci      properties:
1168c2ecf20Sopenharmony_ci        reg:
1178c2ecf20Sopenharmony_ci          maxItems: 1
1188c2ecf20Sopenharmony_ci        reg-names:
1198c2ecf20Sopenharmony_ci          maxItems: 1
1208c2ecf20Sopenharmony_ci
1218c2ecf20Sopenharmony_cirequired:
1228c2ecf20Sopenharmony_ci  - compatible
1238c2ecf20Sopenharmony_ci  - clocks
1248c2ecf20Sopenharmony_ci  - reg
1258c2ecf20Sopenharmony_ci  - reg-names
1268c2ecf20Sopenharmony_ci  - phys
1278c2ecf20Sopenharmony_ci  - phy-names
1288c2ecf20Sopenharmony_ci  - interrupts
1298c2ecf20Sopenharmony_ci  - ports
1308c2ecf20Sopenharmony_ci
1318c2ecf20Sopenharmony_ciadditionalProperties: false
1328c2ecf20Sopenharmony_ci
1338c2ecf20Sopenharmony_ciexamples:
1348c2ecf20Sopenharmony_ci  - |
1358c2ecf20Sopenharmony_ci    #include <dt-bindings/interrupt-controller/arm-gic.h>
1368c2ecf20Sopenharmony_ci    bus {
1378c2ecf20Sopenharmony_ci        #address-cells = <2>;
1388c2ecf20Sopenharmony_ci        #size-cells = <2>;
1398c2ecf20Sopenharmony_ci
1408c2ecf20Sopenharmony_ci        mhdp: dp-bridge@f0fb000000 {
1418c2ecf20Sopenharmony_ci            compatible = "cdns,mhdp8546";
1428c2ecf20Sopenharmony_ci            reg = <0xf0 0xfb000000 0x0 0x1000000>;
1438c2ecf20Sopenharmony_ci            reg-names = "mhdptx";
1448c2ecf20Sopenharmony_ci            clocks = <&mhdp_clock>;
1458c2ecf20Sopenharmony_ci            phys = <&dp_phy>;
1468c2ecf20Sopenharmony_ci            phy-names = "dpphy";
1478c2ecf20Sopenharmony_ci            interrupts = <GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH>;
1488c2ecf20Sopenharmony_ci
1498c2ecf20Sopenharmony_ci            ports {
1508c2ecf20Sopenharmony_ci                #address-cells = <1>;
1518c2ecf20Sopenharmony_ci                #size-cells = <0>;
1528c2ecf20Sopenharmony_ci
1538c2ecf20Sopenharmony_ci                port@0 {
1548c2ecf20Sopenharmony_ci                    reg = <0>;
1558c2ecf20Sopenharmony_ci                    dp_bridge_input: endpoint {
1568c2ecf20Sopenharmony_ci                        remote-endpoint = <&xxx_dpi_output>;
1578c2ecf20Sopenharmony_ci                    };
1588c2ecf20Sopenharmony_ci                };
1598c2ecf20Sopenharmony_ci
1608c2ecf20Sopenharmony_ci                port@4 {
1618c2ecf20Sopenharmony_ci                    reg = <4>;
1628c2ecf20Sopenharmony_ci                    dp_bridge_output: endpoint {
1638c2ecf20Sopenharmony_ci                        remote-endpoint = <&xxx_dp_connector_input>;
1648c2ecf20Sopenharmony_ci                    };
1658c2ecf20Sopenharmony_ci                };
1668c2ecf20Sopenharmony_ci            };
1678c2ecf20Sopenharmony_ci        };
1688c2ecf20Sopenharmony_ci    };
1698c2ecf20Sopenharmony_ci...
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