18c2ecf20Sopenharmony_ciARM Mali-DP 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciThe following bindings apply to a family of Display Processors sold as 48c2ecf20Sopenharmony_cilicensable IP by ARM Ltd. The bindings describe the Mali DP500, DP550 and 58c2ecf20Sopenharmony_ciDP650 processors that offer multiple composition layers, support for 68c2ecf20Sopenharmony_cirotation and scaling output. 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ciRequired properties: 98c2ecf20Sopenharmony_ci - compatible: should be one of 108c2ecf20Sopenharmony_ci "arm,mali-dp500" 118c2ecf20Sopenharmony_ci "arm,mali-dp550" 128c2ecf20Sopenharmony_ci "arm,mali-dp650" 138c2ecf20Sopenharmony_ci depending on the particular implementation present in the hardware 148c2ecf20Sopenharmony_ci - reg: Physical base address and size of the block of registers used by 158c2ecf20Sopenharmony_ci the processor. 168c2ecf20Sopenharmony_ci - interrupts: Interrupt list, as defined in ../interrupt-controller/interrupts.txt, 178c2ecf20Sopenharmony_ci interrupt client nodes. 188c2ecf20Sopenharmony_ci - interrupt-names: name of the engine inside the processor that will 198c2ecf20Sopenharmony_ci use the corresponding interrupt. Should be one of "DE" or "SE". 208c2ecf20Sopenharmony_ci - clocks: A list of phandle + clock-specifier pairs, one for each entry 218c2ecf20Sopenharmony_ci in 'clock-names' 228c2ecf20Sopenharmony_ci - clock-names: A list of clock names. It should contain: 238c2ecf20Sopenharmony_ci - "pclk": for the APB interface clock 248c2ecf20Sopenharmony_ci - "aclk": for the AXI interface clock 258c2ecf20Sopenharmony_ci - "mclk": for the main processor clock 268c2ecf20Sopenharmony_ci - "pxlclk": for the pixel clock feeding the output PLL of the processor. 278c2ecf20Sopenharmony_ci - arm,malidp-output-port-lines: Array of u8 values describing the number 288c2ecf20Sopenharmony_ci of output lines per channel (R, G and B). 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_ciRequired sub-nodes: 318c2ecf20Sopenharmony_ci - port: The Mali DP connection to an encoder input port. The connection 328c2ecf20Sopenharmony_ci is modelled using the OF graph bindings specified in 338c2ecf20Sopenharmony_ci Documentation/devicetree/bindings/graph.txt 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_ciOptional properties: 368c2ecf20Sopenharmony_ci - memory-region: phandle to a node describing memory (see 378c2ecf20Sopenharmony_ci Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt) 388c2ecf20Sopenharmony_ci to be used for the framebuffer; if not present, the framebuffer may 398c2ecf20Sopenharmony_ci be located anywhere in memory. 408c2ecf20Sopenharmony_ci - arm,malidp-arqos-high-level: integer of u32 value describing the ARQoS 418c2ecf20Sopenharmony_ci levels of DP500's QoS signaling. 428c2ecf20Sopenharmony_ci 438c2ecf20Sopenharmony_ci 448c2ecf20Sopenharmony_ciExample: 458c2ecf20Sopenharmony_ci 468c2ecf20Sopenharmony_ci/ { 478c2ecf20Sopenharmony_ci ... 488c2ecf20Sopenharmony_ci 498c2ecf20Sopenharmony_ci dp0: malidp@6f200000 { 508c2ecf20Sopenharmony_ci compatible = "arm,mali-dp650"; 518c2ecf20Sopenharmony_ci reg = <0 0x6f200000 0 0x20000>; 528c2ecf20Sopenharmony_ci memory-region = <&display_reserved>; 538c2ecf20Sopenharmony_ci interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>, 548c2ecf20Sopenharmony_ci <0 168 IRQ_TYPE_LEVEL_HIGH>; 558c2ecf20Sopenharmony_ci interrupt-names = "DE", "SE"; 568c2ecf20Sopenharmony_ci clocks = <&oscclk2>, <&fpgaosc0>, <&fpgaosc1>, <&fpgaosc1>; 578c2ecf20Sopenharmony_ci clock-names = "pxlclk", "mclk", "aclk", "pclk"; 588c2ecf20Sopenharmony_ci arm,malidp-output-port-lines = /bits/ 8 <8 8 8>; 598c2ecf20Sopenharmony_ci arm,malidp-arqos-high-level = <0xd000d000>; 608c2ecf20Sopenharmony_ci port { 618c2ecf20Sopenharmony_ci dp0_output: endpoint { 628c2ecf20Sopenharmony_ci remote-endpoint = <&tda998x_2_input>; 638c2ecf20Sopenharmony_ci }; 648c2ecf20Sopenharmony_ci }; 658c2ecf20Sopenharmony_ci }; 668c2ecf20Sopenharmony_ci 678c2ecf20Sopenharmony_ci ... 688c2ecf20Sopenharmony_ci}; 69