18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0 28c2ecf20Sopenharmony_ci%YAML 1.2 38c2ecf20Sopenharmony_ci--- 48c2ecf20Sopenharmony_ci$id: http://devicetree.org/schemas/display/allwinner,sun9i-a80-deu.yaml# 58c2ecf20Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_cititle: Allwinner A80 Detail Enhancement Unit Device Tree Bindings 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_cimaintainers: 108c2ecf20Sopenharmony_ci - Chen-Yu Tsai <wens@csie.org> 118c2ecf20Sopenharmony_ci - Maxime Ripard <mripard@kernel.org> 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_cidescription: | 148c2ecf20Sopenharmony_ci The DEU (Detail Enhancement Unit), found in the Allwinner A80 SoC, 158c2ecf20Sopenharmony_ci can sharpen the display content in both luma and chroma channels. 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ciproperties: 188c2ecf20Sopenharmony_ci compatible: 198c2ecf20Sopenharmony_ci const: allwinner,sun9i-a80-deu 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ci reg: 228c2ecf20Sopenharmony_ci maxItems: 1 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci interrupts: 258c2ecf20Sopenharmony_ci maxItems: 1 268c2ecf20Sopenharmony_ci 278c2ecf20Sopenharmony_ci clocks: 288c2ecf20Sopenharmony_ci items: 298c2ecf20Sopenharmony_ci - description: The DEU interface clock 308c2ecf20Sopenharmony_ci - description: The DEU module clock 318c2ecf20Sopenharmony_ci - description: The DEU DRAM clock 328c2ecf20Sopenharmony_ci 338c2ecf20Sopenharmony_ci clock-names: 348c2ecf20Sopenharmony_ci items: 358c2ecf20Sopenharmony_ci - const: ahb 368c2ecf20Sopenharmony_ci - const: mod 378c2ecf20Sopenharmony_ci - const: ram 388c2ecf20Sopenharmony_ci 398c2ecf20Sopenharmony_ci resets: 408c2ecf20Sopenharmony_ci maxItems: 1 418c2ecf20Sopenharmony_ci 428c2ecf20Sopenharmony_ci ports: 438c2ecf20Sopenharmony_ci type: object 448c2ecf20Sopenharmony_ci description: | 458c2ecf20Sopenharmony_ci A ports node with endpoint definitions as defined in 468c2ecf20Sopenharmony_ci Documentation/devicetree/bindings/media/video-interfaces.txt. 478c2ecf20Sopenharmony_ci 488c2ecf20Sopenharmony_ci properties: 498c2ecf20Sopenharmony_ci "#address-cells": 508c2ecf20Sopenharmony_ci const: 1 518c2ecf20Sopenharmony_ci 528c2ecf20Sopenharmony_ci "#size-cells": 538c2ecf20Sopenharmony_ci const: 0 548c2ecf20Sopenharmony_ci 558c2ecf20Sopenharmony_ci port@0: 568c2ecf20Sopenharmony_ci type: object 578c2ecf20Sopenharmony_ci description: | 588c2ecf20Sopenharmony_ci Input endpoints of the controller. 598c2ecf20Sopenharmony_ci 608c2ecf20Sopenharmony_ci port@1: 618c2ecf20Sopenharmony_ci type: object 628c2ecf20Sopenharmony_ci description: | 638c2ecf20Sopenharmony_ci Output endpoints of the controller. 648c2ecf20Sopenharmony_ci 658c2ecf20Sopenharmony_ci required: 668c2ecf20Sopenharmony_ci - "#address-cells" 678c2ecf20Sopenharmony_ci - "#size-cells" 688c2ecf20Sopenharmony_ci - port@0 698c2ecf20Sopenharmony_ci - port@1 708c2ecf20Sopenharmony_ci 718c2ecf20Sopenharmony_ci additionalProperties: false 728c2ecf20Sopenharmony_ci 738c2ecf20Sopenharmony_cirequired: 748c2ecf20Sopenharmony_ci - compatible 758c2ecf20Sopenharmony_ci - reg 768c2ecf20Sopenharmony_ci - interrupts 778c2ecf20Sopenharmony_ci - clocks 788c2ecf20Sopenharmony_ci - clock-names 798c2ecf20Sopenharmony_ci - resets 808c2ecf20Sopenharmony_ci - ports 818c2ecf20Sopenharmony_ci 828c2ecf20Sopenharmony_ciadditionalProperties: false 838c2ecf20Sopenharmony_ci 848c2ecf20Sopenharmony_ciexamples: 858c2ecf20Sopenharmony_ci - | 868c2ecf20Sopenharmony_ci #include <dt-bindings/interrupt-controller/arm-gic.h> 878c2ecf20Sopenharmony_ci 888c2ecf20Sopenharmony_ci #include <dt-bindings/clock/sun9i-a80-de.h> 898c2ecf20Sopenharmony_ci #include <dt-bindings/reset/sun9i-a80-de.h> 908c2ecf20Sopenharmony_ci 918c2ecf20Sopenharmony_ci deu0: deu@3300000 { 928c2ecf20Sopenharmony_ci compatible = "allwinner,sun9i-a80-deu"; 938c2ecf20Sopenharmony_ci reg = <0x03300000 0x40000>; 948c2ecf20Sopenharmony_ci interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; 958c2ecf20Sopenharmony_ci clocks = <&de_clocks CLK_BUS_DEU0>, 968c2ecf20Sopenharmony_ci <&de_clocks CLK_IEP_DEU0>, 978c2ecf20Sopenharmony_ci <&de_clocks CLK_DRAM_DEU0>; 988c2ecf20Sopenharmony_ci clock-names = "ahb", 998c2ecf20Sopenharmony_ci "mod", 1008c2ecf20Sopenharmony_ci "ram"; 1018c2ecf20Sopenharmony_ci resets = <&de_clocks RST_DEU0>; 1028c2ecf20Sopenharmony_ci 1038c2ecf20Sopenharmony_ci ports { 1048c2ecf20Sopenharmony_ci #address-cells = <1>; 1058c2ecf20Sopenharmony_ci #size-cells = <0>; 1068c2ecf20Sopenharmony_ci 1078c2ecf20Sopenharmony_ci deu0_in: port@0 { 1088c2ecf20Sopenharmony_ci reg = <0>; 1098c2ecf20Sopenharmony_ci 1108c2ecf20Sopenharmony_ci deu0_in_fe0: endpoint { 1118c2ecf20Sopenharmony_ci remote-endpoint = <&fe0_out_deu0>; 1128c2ecf20Sopenharmony_ci }; 1138c2ecf20Sopenharmony_ci }; 1148c2ecf20Sopenharmony_ci 1158c2ecf20Sopenharmony_ci deu0_out: port@1 { 1168c2ecf20Sopenharmony_ci #address-cells = <1>; 1178c2ecf20Sopenharmony_ci #size-cells = <0>; 1188c2ecf20Sopenharmony_ci reg = <1>; 1198c2ecf20Sopenharmony_ci 1208c2ecf20Sopenharmony_ci deu0_out_be0: endpoint@0 { 1218c2ecf20Sopenharmony_ci reg = <0>; 1228c2ecf20Sopenharmony_ci remote-endpoint = <&be0_in_deu0>; 1238c2ecf20Sopenharmony_ci }; 1248c2ecf20Sopenharmony_ci 1258c2ecf20Sopenharmony_ci deu0_out_be1: endpoint@1 { 1268c2ecf20Sopenharmony_ci reg = <1>; 1278c2ecf20Sopenharmony_ci remote-endpoint = <&be1_in_deu0>; 1288c2ecf20Sopenharmony_ci }; 1298c2ecf20Sopenharmony_ci }; 1308c2ecf20Sopenharmony_ci }; 1318c2ecf20Sopenharmony_ci }; 1328c2ecf20Sopenharmony_ci 1338c2ecf20Sopenharmony_ci... 134