18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0 28c2ecf20Sopenharmony_ci%YAML 1.2 38c2ecf20Sopenharmony_ci--- 48c2ecf20Sopenharmony_ci$id: http://devicetree.org/schemas/display/allwinner,sun6i-a31-drc.yaml# 58c2ecf20Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_cititle: Allwinner A31 Dynamic Range Controller Device Tree Bindings 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_cimaintainers: 108c2ecf20Sopenharmony_ci - Chen-Yu Tsai <wens@csie.org> 118c2ecf20Sopenharmony_ci - Maxime Ripard <mripard@kernel.org> 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_cidescription: | 148c2ecf20Sopenharmony_ci The DRC (Dynamic Range Controller) allows to dynamically adjust 158c2ecf20Sopenharmony_ci pixel brightness/contrast based on histogram measurements for LCD 168c2ecf20Sopenharmony_ci content adaptive backlight control. 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_ciproperties: 198c2ecf20Sopenharmony_ci compatible: 208c2ecf20Sopenharmony_ci enum: 218c2ecf20Sopenharmony_ci - allwinner,sun6i-a31-drc 228c2ecf20Sopenharmony_ci - allwinner,sun6i-a31s-drc 238c2ecf20Sopenharmony_ci - allwinner,sun8i-a23-drc 248c2ecf20Sopenharmony_ci - allwinner,sun8i-a33-drc 258c2ecf20Sopenharmony_ci - allwinner,sun9i-a80-drc 268c2ecf20Sopenharmony_ci 278c2ecf20Sopenharmony_ci reg: 288c2ecf20Sopenharmony_ci maxItems: 1 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_ci interrupts: 318c2ecf20Sopenharmony_ci maxItems: 1 328c2ecf20Sopenharmony_ci 338c2ecf20Sopenharmony_ci clocks: 348c2ecf20Sopenharmony_ci items: 358c2ecf20Sopenharmony_ci - description: The DRC interface clock 368c2ecf20Sopenharmony_ci - description: The DRC module clock 378c2ecf20Sopenharmony_ci - description: The DRC DRAM clock 388c2ecf20Sopenharmony_ci 398c2ecf20Sopenharmony_ci clock-names: 408c2ecf20Sopenharmony_ci items: 418c2ecf20Sopenharmony_ci - const: ahb 428c2ecf20Sopenharmony_ci - const: mod 438c2ecf20Sopenharmony_ci - const: ram 448c2ecf20Sopenharmony_ci 458c2ecf20Sopenharmony_ci resets: 468c2ecf20Sopenharmony_ci maxItems: 1 478c2ecf20Sopenharmony_ci 488c2ecf20Sopenharmony_ci ports: 498c2ecf20Sopenharmony_ci type: object 508c2ecf20Sopenharmony_ci description: | 518c2ecf20Sopenharmony_ci A ports node with endpoint definitions as defined in 528c2ecf20Sopenharmony_ci Documentation/devicetree/bindings/media/video-interfaces.txt. 538c2ecf20Sopenharmony_ci 548c2ecf20Sopenharmony_ci properties: 558c2ecf20Sopenharmony_ci "#address-cells": 568c2ecf20Sopenharmony_ci const: 1 578c2ecf20Sopenharmony_ci 588c2ecf20Sopenharmony_ci "#size-cells": 598c2ecf20Sopenharmony_ci const: 0 608c2ecf20Sopenharmony_ci 618c2ecf20Sopenharmony_ci port@0: 628c2ecf20Sopenharmony_ci type: object 638c2ecf20Sopenharmony_ci description: | 648c2ecf20Sopenharmony_ci Input endpoints of the controller. 658c2ecf20Sopenharmony_ci 668c2ecf20Sopenharmony_ci port@1: 678c2ecf20Sopenharmony_ci type: object 688c2ecf20Sopenharmony_ci description: | 698c2ecf20Sopenharmony_ci Output endpoints of the controller. 708c2ecf20Sopenharmony_ci 718c2ecf20Sopenharmony_ci required: 728c2ecf20Sopenharmony_ci - "#address-cells" 738c2ecf20Sopenharmony_ci - "#size-cells" 748c2ecf20Sopenharmony_ci - port@0 758c2ecf20Sopenharmony_ci - port@1 768c2ecf20Sopenharmony_ci 778c2ecf20Sopenharmony_ci additionalProperties: false 788c2ecf20Sopenharmony_ci 798c2ecf20Sopenharmony_cirequired: 808c2ecf20Sopenharmony_ci - compatible 818c2ecf20Sopenharmony_ci - reg 828c2ecf20Sopenharmony_ci - interrupts 838c2ecf20Sopenharmony_ci - clocks 848c2ecf20Sopenharmony_ci - clock-names 858c2ecf20Sopenharmony_ci - resets 868c2ecf20Sopenharmony_ci - ports 878c2ecf20Sopenharmony_ci 888c2ecf20Sopenharmony_ciadditionalProperties: false 898c2ecf20Sopenharmony_ci 908c2ecf20Sopenharmony_ciexamples: 918c2ecf20Sopenharmony_ci - | 928c2ecf20Sopenharmony_ci #include <dt-bindings/interrupt-controller/arm-gic.h> 938c2ecf20Sopenharmony_ci 948c2ecf20Sopenharmony_ci #include <dt-bindings/clock/sun6i-a31-ccu.h> 958c2ecf20Sopenharmony_ci #include <dt-bindings/reset/sun6i-a31-ccu.h> 968c2ecf20Sopenharmony_ci 978c2ecf20Sopenharmony_ci drc0: drc@1e70000 { 988c2ecf20Sopenharmony_ci compatible = "allwinner,sun6i-a31-drc"; 998c2ecf20Sopenharmony_ci reg = <0x01e70000 0x10000>; 1008c2ecf20Sopenharmony_ci interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; 1018c2ecf20Sopenharmony_ci clocks = <&ccu CLK_AHB1_DRC0>, <&ccu CLK_IEP_DRC0>, 1028c2ecf20Sopenharmony_ci <&ccu CLK_DRAM_DRC0>; 1038c2ecf20Sopenharmony_ci clock-names = "ahb", "mod", 1048c2ecf20Sopenharmony_ci "ram"; 1058c2ecf20Sopenharmony_ci resets = <&ccu RST_AHB1_DRC0>; 1068c2ecf20Sopenharmony_ci 1078c2ecf20Sopenharmony_ci ports { 1088c2ecf20Sopenharmony_ci #address-cells = <1>; 1098c2ecf20Sopenharmony_ci #size-cells = <0>; 1108c2ecf20Sopenharmony_ci 1118c2ecf20Sopenharmony_ci drc0_in: port@0 { 1128c2ecf20Sopenharmony_ci reg = <0>; 1138c2ecf20Sopenharmony_ci 1148c2ecf20Sopenharmony_ci drc0_in_be0: endpoint { 1158c2ecf20Sopenharmony_ci remote-endpoint = <&be0_out_drc0>; 1168c2ecf20Sopenharmony_ci }; 1178c2ecf20Sopenharmony_ci }; 1188c2ecf20Sopenharmony_ci 1198c2ecf20Sopenharmony_ci drc0_out: port@1 { 1208c2ecf20Sopenharmony_ci #address-cells = <1>; 1218c2ecf20Sopenharmony_ci #size-cells = <0>; 1228c2ecf20Sopenharmony_ci reg = <1>; 1238c2ecf20Sopenharmony_ci 1248c2ecf20Sopenharmony_ci drc0_out_tcon0: endpoint@0 { 1258c2ecf20Sopenharmony_ci reg = <0>; 1268c2ecf20Sopenharmony_ci remote-endpoint = <&tcon0_in_drc0>; 1278c2ecf20Sopenharmony_ci }; 1288c2ecf20Sopenharmony_ci 1298c2ecf20Sopenharmony_ci drc0_out_tcon1: endpoint@1 { 1308c2ecf20Sopenharmony_ci reg = <1>; 1318c2ecf20Sopenharmony_ci remote-endpoint = <&tcon1_in_drc0>; 1328c2ecf20Sopenharmony_ci }; 1338c2ecf20Sopenharmony_ci }; 1348c2ecf20Sopenharmony_ci }; 1358c2ecf20Sopenharmony_ci }; 1368c2ecf20Sopenharmony_ci 1378c2ecf20Sopenharmony_ci 1388c2ecf20Sopenharmony_ci... 139