18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0
28c2ecf20Sopenharmony_ci%YAML 1.2
38c2ecf20Sopenharmony_ci---
48c2ecf20Sopenharmony_ci$id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-display-backend.yaml#
58c2ecf20Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_cititle: Allwinner A10 Display Engine Backend Device Tree Bindings
88c2ecf20Sopenharmony_ci
98c2ecf20Sopenharmony_cimaintainers:
108c2ecf20Sopenharmony_ci  - Chen-Yu Tsai <wens@csie.org>
118c2ecf20Sopenharmony_ci  - Maxime Ripard <mripard@kernel.org>
128c2ecf20Sopenharmony_ci
138c2ecf20Sopenharmony_cidescription: |
148c2ecf20Sopenharmony_ci  The display engine backend exposes layers and sprites to the system.
158c2ecf20Sopenharmony_ci
168c2ecf20Sopenharmony_ciproperties:
178c2ecf20Sopenharmony_ci  compatible:
188c2ecf20Sopenharmony_ci    enum:
198c2ecf20Sopenharmony_ci      - allwinner,sun4i-a10-display-backend
208c2ecf20Sopenharmony_ci      - allwinner,sun5i-a13-display-backend
218c2ecf20Sopenharmony_ci      - allwinner,sun6i-a31-display-backend
228c2ecf20Sopenharmony_ci      - allwinner,sun7i-a20-display-backend
238c2ecf20Sopenharmony_ci      - allwinner,sun8i-a23-display-backend
248c2ecf20Sopenharmony_ci      - allwinner,sun8i-a33-display-backend
258c2ecf20Sopenharmony_ci      - allwinner,sun9i-a80-display-backend
268c2ecf20Sopenharmony_ci
278c2ecf20Sopenharmony_ci  reg:
288c2ecf20Sopenharmony_ci    minItems: 1
298c2ecf20Sopenharmony_ci    maxItems: 2
308c2ecf20Sopenharmony_ci    items:
318c2ecf20Sopenharmony_ci      - description: Display Backend registers
328c2ecf20Sopenharmony_ci      - description: SAT registers
338c2ecf20Sopenharmony_ci
348c2ecf20Sopenharmony_ci  reg-names:
358c2ecf20Sopenharmony_ci    minItems: 1
368c2ecf20Sopenharmony_ci    maxItems: 2
378c2ecf20Sopenharmony_ci    items:
388c2ecf20Sopenharmony_ci      - const: be
398c2ecf20Sopenharmony_ci      - const: sat
408c2ecf20Sopenharmony_ci
418c2ecf20Sopenharmony_ci  interrupts:
428c2ecf20Sopenharmony_ci    maxItems: 1
438c2ecf20Sopenharmony_ci
448c2ecf20Sopenharmony_ci  clocks:
458c2ecf20Sopenharmony_ci    minItems: 3
468c2ecf20Sopenharmony_ci    maxItems: 4
478c2ecf20Sopenharmony_ci    items:
488c2ecf20Sopenharmony_ci      - description: The backend interface clock
498c2ecf20Sopenharmony_ci      - description: The backend module clock
508c2ecf20Sopenharmony_ci      - description: The backend DRAM clock
518c2ecf20Sopenharmony_ci      - description: The SAT clock
528c2ecf20Sopenharmony_ci
538c2ecf20Sopenharmony_ci  clock-names:
548c2ecf20Sopenharmony_ci    minItems: 3
558c2ecf20Sopenharmony_ci    maxItems: 4
568c2ecf20Sopenharmony_ci    items:
578c2ecf20Sopenharmony_ci      - const: ahb
588c2ecf20Sopenharmony_ci      - const: mod
598c2ecf20Sopenharmony_ci      - const: ram
608c2ecf20Sopenharmony_ci      - const: sat
618c2ecf20Sopenharmony_ci
628c2ecf20Sopenharmony_ci  resets:
638c2ecf20Sopenharmony_ci    minItems: 1
648c2ecf20Sopenharmony_ci    maxItems: 2
658c2ecf20Sopenharmony_ci    items:
668c2ecf20Sopenharmony_ci      - description: The Backend reset line
678c2ecf20Sopenharmony_ci      - description: The SAT reset line
688c2ecf20Sopenharmony_ci
698c2ecf20Sopenharmony_ci  reset-names:
708c2ecf20Sopenharmony_ci    minItems: 1
718c2ecf20Sopenharmony_ci    maxItems: 2
728c2ecf20Sopenharmony_ci    items:
738c2ecf20Sopenharmony_ci      - const: be
748c2ecf20Sopenharmony_ci      - const: sat
758c2ecf20Sopenharmony_ci
768c2ecf20Sopenharmony_ci  # FIXME: This should be made required eventually once every SoC will
778c2ecf20Sopenharmony_ci  # have the MBUS declared.
788c2ecf20Sopenharmony_ci  interconnects:
798c2ecf20Sopenharmony_ci    maxItems: 1
808c2ecf20Sopenharmony_ci
818c2ecf20Sopenharmony_ci  # FIXME: This should be made required eventually once every SoC will
828c2ecf20Sopenharmony_ci  # have the MBUS declared.
838c2ecf20Sopenharmony_ci  interconnect-names:
848c2ecf20Sopenharmony_ci    const: dma-mem
858c2ecf20Sopenharmony_ci
868c2ecf20Sopenharmony_ci  ports:
878c2ecf20Sopenharmony_ci    type: object
888c2ecf20Sopenharmony_ci    description: |
898c2ecf20Sopenharmony_ci      A ports node with endpoint definitions as defined in
908c2ecf20Sopenharmony_ci      Documentation/devicetree/bindings/media/video-interfaces.txt.
918c2ecf20Sopenharmony_ci
928c2ecf20Sopenharmony_ci    properties:
938c2ecf20Sopenharmony_ci      "#address-cells":
948c2ecf20Sopenharmony_ci        const: 1
958c2ecf20Sopenharmony_ci
968c2ecf20Sopenharmony_ci      "#size-cells":
978c2ecf20Sopenharmony_ci        const: 0
988c2ecf20Sopenharmony_ci
998c2ecf20Sopenharmony_ci      port@0:
1008c2ecf20Sopenharmony_ci        type: object
1018c2ecf20Sopenharmony_ci        description: |
1028c2ecf20Sopenharmony_ci          Input endpoints of the controller.
1038c2ecf20Sopenharmony_ci
1048c2ecf20Sopenharmony_ci      port@1:
1058c2ecf20Sopenharmony_ci        type: object
1068c2ecf20Sopenharmony_ci        description: |
1078c2ecf20Sopenharmony_ci          Output endpoints of the controller.
1088c2ecf20Sopenharmony_ci
1098c2ecf20Sopenharmony_ci    required:
1108c2ecf20Sopenharmony_ci      - "#address-cells"
1118c2ecf20Sopenharmony_ci      - "#size-cells"
1128c2ecf20Sopenharmony_ci      - port@0
1138c2ecf20Sopenharmony_ci      - port@1
1148c2ecf20Sopenharmony_ci
1158c2ecf20Sopenharmony_ci    additionalProperties: false
1168c2ecf20Sopenharmony_ci
1178c2ecf20Sopenharmony_cirequired:
1188c2ecf20Sopenharmony_ci  - compatible
1198c2ecf20Sopenharmony_ci  - reg
1208c2ecf20Sopenharmony_ci  - interrupts
1218c2ecf20Sopenharmony_ci  - clocks
1228c2ecf20Sopenharmony_ci  - clock-names
1238c2ecf20Sopenharmony_ci  - resets
1248c2ecf20Sopenharmony_ci  - ports
1258c2ecf20Sopenharmony_ci
1268c2ecf20Sopenharmony_ciadditionalProperties: false
1278c2ecf20Sopenharmony_ci
1288c2ecf20Sopenharmony_ciif:
1298c2ecf20Sopenharmony_ci  properties:
1308c2ecf20Sopenharmony_ci    compatible:
1318c2ecf20Sopenharmony_ci      contains:
1328c2ecf20Sopenharmony_ci        const: allwinner,sun8i-a33-display-backend
1338c2ecf20Sopenharmony_ci
1348c2ecf20Sopenharmony_cithen:
1358c2ecf20Sopenharmony_ci  properties:
1368c2ecf20Sopenharmony_ci    reg:
1378c2ecf20Sopenharmony_ci      minItems: 2
1388c2ecf20Sopenharmony_ci
1398c2ecf20Sopenharmony_ci    reg-names:
1408c2ecf20Sopenharmony_ci      minItems: 2
1418c2ecf20Sopenharmony_ci
1428c2ecf20Sopenharmony_ci    clocks:
1438c2ecf20Sopenharmony_ci      minItems: 4
1448c2ecf20Sopenharmony_ci
1458c2ecf20Sopenharmony_ci    clock-names:
1468c2ecf20Sopenharmony_ci      minItems: 4
1478c2ecf20Sopenharmony_ci
1488c2ecf20Sopenharmony_ci    resets:
1498c2ecf20Sopenharmony_ci      minItems: 2
1508c2ecf20Sopenharmony_ci
1518c2ecf20Sopenharmony_ci    reset-names:
1528c2ecf20Sopenharmony_ci      minItems: 2
1538c2ecf20Sopenharmony_ci
1548c2ecf20Sopenharmony_ci  required:
1558c2ecf20Sopenharmony_ci    - reg-names
1568c2ecf20Sopenharmony_ci    - reset-names
1578c2ecf20Sopenharmony_ci
1588c2ecf20Sopenharmony_cielse:
1598c2ecf20Sopenharmony_ci  properties:
1608c2ecf20Sopenharmony_ci    reg:
1618c2ecf20Sopenharmony_ci      maxItems: 1
1628c2ecf20Sopenharmony_ci
1638c2ecf20Sopenharmony_ci    reg-names:
1648c2ecf20Sopenharmony_ci      maxItems: 1
1658c2ecf20Sopenharmony_ci
1668c2ecf20Sopenharmony_ci    clocks:
1678c2ecf20Sopenharmony_ci      maxItems: 3
1688c2ecf20Sopenharmony_ci
1698c2ecf20Sopenharmony_ci    clock-names:
1708c2ecf20Sopenharmony_ci      maxItems: 3
1718c2ecf20Sopenharmony_ci
1728c2ecf20Sopenharmony_ci    resets:
1738c2ecf20Sopenharmony_ci      maxItems: 1
1748c2ecf20Sopenharmony_ci
1758c2ecf20Sopenharmony_ci    reset-names:
1768c2ecf20Sopenharmony_ci      maxItems: 1
1778c2ecf20Sopenharmony_ci
1788c2ecf20Sopenharmony_ciexamples:
1798c2ecf20Sopenharmony_ci  - |
1808c2ecf20Sopenharmony_ci    /*
1818c2ecf20Sopenharmony_ci     * This comes from the clock/sun4i-a10-ccu.h and
1828c2ecf20Sopenharmony_ci     * reset/sun4i-a10-ccu.h headers, but we can't include them since
1838c2ecf20Sopenharmony_ci     * it would trigger a bunch of warnings for redefinitions of
1848c2ecf20Sopenharmony_ci     * symbols with the other example.
1858c2ecf20Sopenharmony_ci     */
1868c2ecf20Sopenharmony_ci
1878c2ecf20Sopenharmony_ci    #define CLK_AHB_DE_BE0	42
1888c2ecf20Sopenharmony_ci    #define CLK_DRAM_DE_BE0	140
1898c2ecf20Sopenharmony_ci    #define CLK_DE_BE0		144
1908c2ecf20Sopenharmony_ci    #define RST_DE_BE0		5
1918c2ecf20Sopenharmony_ci
1928c2ecf20Sopenharmony_ci    display-backend@1e60000 {
1938c2ecf20Sopenharmony_ci        compatible = "allwinner,sun4i-a10-display-backend";
1948c2ecf20Sopenharmony_ci        reg = <0x01e60000 0x10000>;
1958c2ecf20Sopenharmony_ci        interrupts = <47>;
1968c2ecf20Sopenharmony_ci        clocks = <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_DE_BE0>,
1978c2ecf20Sopenharmony_ci                 <&ccu CLK_DRAM_DE_BE0>;
1988c2ecf20Sopenharmony_ci        clock-names = "ahb", "mod",
1998c2ecf20Sopenharmony_ci                      "ram";
2008c2ecf20Sopenharmony_ci        resets = <&ccu RST_DE_BE0>;
2018c2ecf20Sopenharmony_ci
2028c2ecf20Sopenharmony_ci        ports {
2038c2ecf20Sopenharmony_ci            #address-cells = <1>;
2048c2ecf20Sopenharmony_ci            #size-cells = <0>;
2058c2ecf20Sopenharmony_ci
2068c2ecf20Sopenharmony_ci            port@0 {
2078c2ecf20Sopenharmony_ci                #address-cells = <1>;
2088c2ecf20Sopenharmony_ci                #size-cells = <0>;
2098c2ecf20Sopenharmony_ci                reg = <0>;
2108c2ecf20Sopenharmony_ci
2118c2ecf20Sopenharmony_ci                endpoint@0 {
2128c2ecf20Sopenharmony_ci                    reg = <0>;
2138c2ecf20Sopenharmony_ci                    remote-endpoint = <&fe0_out_be0>;
2148c2ecf20Sopenharmony_ci                };
2158c2ecf20Sopenharmony_ci
2168c2ecf20Sopenharmony_ci                endpoint@1 {
2178c2ecf20Sopenharmony_ci                    reg = <1>;
2188c2ecf20Sopenharmony_ci                    remote-endpoint = <&fe1_out_be0>;
2198c2ecf20Sopenharmony_ci                };
2208c2ecf20Sopenharmony_ci            };
2218c2ecf20Sopenharmony_ci
2228c2ecf20Sopenharmony_ci            port@1 {
2238c2ecf20Sopenharmony_ci                #address-cells = <1>;
2248c2ecf20Sopenharmony_ci                #size-cells = <0>;
2258c2ecf20Sopenharmony_ci                reg = <1>;
2268c2ecf20Sopenharmony_ci
2278c2ecf20Sopenharmony_ci                endpoint@0 {
2288c2ecf20Sopenharmony_ci                    reg = <0>;
2298c2ecf20Sopenharmony_ci                    remote-endpoint = <&tcon0_in_be0>;
2308c2ecf20Sopenharmony_ci                };
2318c2ecf20Sopenharmony_ci
2328c2ecf20Sopenharmony_ci                endpoint@1 {
2338c2ecf20Sopenharmony_ci                    reg = <1>;
2348c2ecf20Sopenharmony_ci                    remote-endpoint = <&tcon1_in_be0>;
2358c2ecf20Sopenharmony_ci                };
2368c2ecf20Sopenharmony_ci            };
2378c2ecf20Sopenharmony_ci        };
2388c2ecf20Sopenharmony_ci    };
2398c2ecf20Sopenharmony_ci
2408c2ecf20Sopenharmony_ci  - |
2418c2ecf20Sopenharmony_ci    #include <dt-bindings/interrupt-controller/arm-gic.h>
2428c2ecf20Sopenharmony_ci
2438c2ecf20Sopenharmony_ci    /*
2448c2ecf20Sopenharmony_ci     * This comes from the clock/sun8i-a23-a33-ccu.h and
2458c2ecf20Sopenharmony_ci     * reset/sun8i-a23-a33-ccu.h headers, but we can't include them
2468c2ecf20Sopenharmony_ci     * since it would trigger a bunch of warnings for redefinitions of
2478c2ecf20Sopenharmony_ci     * symbols with the other example.
2488c2ecf20Sopenharmony_ci     */
2498c2ecf20Sopenharmony_ci
2508c2ecf20Sopenharmony_ci    #define CLK_BUS_DE_BE	40
2518c2ecf20Sopenharmony_ci    #define CLK_BUS_SAT		46
2528c2ecf20Sopenharmony_ci    #define CLK_DRAM_DE_BE	84
2538c2ecf20Sopenharmony_ci    #define CLK_DE_BE		85
2548c2ecf20Sopenharmony_ci    #define RST_BUS_DE_BE	21
2558c2ecf20Sopenharmony_ci    #define RST_BUS_SAT		27
2568c2ecf20Sopenharmony_ci
2578c2ecf20Sopenharmony_ci    display-backend@1e60000 {
2588c2ecf20Sopenharmony_ci        compatible = "allwinner,sun8i-a33-display-backend";
2598c2ecf20Sopenharmony_ci        reg = <0x01e60000 0x10000>, <0x01e80000 0x1000>;
2608c2ecf20Sopenharmony_ci        reg-names = "be", "sat";
2618c2ecf20Sopenharmony_ci        interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
2628c2ecf20Sopenharmony_ci        clocks = <&ccu CLK_BUS_DE_BE>, <&ccu CLK_DE_BE>,
2638c2ecf20Sopenharmony_ci                 <&ccu CLK_DRAM_DE_BE>, <&ccu CLK_BUS_SAT>;
2648c2ecf20Sopenharmony_ci        clock-names = "ahb", "mod",
2658c2ecf20Sopenharmony_ci                      "ram", "sat";
2668c2ecf20Sopenharmony_ci        resets = <&ccu RST_BUS_DE_BE>, <&ccu RST_BUS_SAT>;
2678c2ecf20Sopenharmony_ci        reset-names = "be", "sat";
2688c2ecf20Sopenharmony_ci
2698c2ecf20Sopenharmony_ci        ports {
2708c2ecf20Sopenharmony_ci            #address-cells = <1>;
2718c2ecf20Sopenharmony_ci            #size-cells = <0>;
2728c2ecf20Sopenharmony_ci
2738c2ecf20Sopenharmony_ci            port@0 {
2748c2ecf20Sopenharmony_ci                reg = <0>;
2758c2ecf20Sopenharmony_ci
2768c2ecf20Sopenharmony_ci                endpoint {
2778c2ecf20Sopenharmony_ci                    remote-endpoint = <&fe0_out_be0>;
2788c2ecf20Sopenharmony_ci                };
2798c2ecf20Sopenharmony_ci            };
2808c2ecf20Sopenharmony_ci
2818c2ecf20Sopenharmony_ci            port@1 {
2828c2ecf20Sopenharmony_ci                reg = <1>;
2838c2ecf20Sopenharmony_ci
2848c2ecf20Sopenharmony_ci                endpoint {
2858c2ecf20Sopenharmony_ci                    remote-endpoint = <&drc0_in_be0>;
2868c2ecf20Sopenharmony_ci                };
2878c2ecf20Sopenharmony_ci            };
2888c2ecf20Sopenharmony_ci        };
2898c2ecf20Sopenharmony_ci    };
2908c2ecf20Sopenharmony_ci
2918c2ecf20Sopenharmony_ci...
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