18c2ecf20Sopenharmony_ciTI CPUFreq and OPP bindings
28c2ecf20Sopenharmony_ci================================
38c2ecf20Sopenharmony_ci
48c2ecf20Sopenharmony_ciCertain TI SoCs, like those in the am335x, am437x, am57xx, and dra7xx
58c2ecf20Sopenharmony_cifamilies support different OPPs depending on the silicon variant in use.
68c2ecf20Sopenharmony_ciThe ti-cpufreq driver can use revision and an efuse value from the SoC to
78c2ecf20Sopenharmony_ciprovide the OPP framework with supported hardware information. This is
88c2ecf20Sopenharmony_ciused to determine which OPPs from the operating-points-v2 table get enabled
98c2ecf20Sopenharmony_ciwhen it is parsed by the OPP framework.
108c2ecf20Sopenharmony_ci
118c2ecf20Sopenharmony_ciRequired properties:
128c2ecf20Sopenharmony_ci--------------------
138c2ecf20Sopenharmony_ciIn 'cpus' nodes:
148c2ecf20Sopenharmony_ci- operating-points-v2: Phandle to the operating-points-v2 table to use.
158c2ecf20Sopenharmony_ci
168c2ecf20Sopenharmony_ciIn 'operating-points-v2' table:
178c2ecf20Sopenharmony_ci- compatible: Should be
188c2ecf20Sopenharmony_ci	- 'operating-points-v2-ti-cpu' for am335x, am43xx, and dra7xx/am57xx,
198c2ecf20Sopenharmony_ci	  omap34xx, omap36xx and am3517 SoCs
208c2ecf20Sopenharmony_ci- syscon: A phandle pointing to a syscon node representing the control module
218c2ecf20Sopenharmony_ci	  register space of the SoC.
228c2ecf20Sopenharmony_ci
238c2ecf20Sopenharmony_ciOptional properties:
248c2ecf20Sopenharmony_ci--------------------
258c2ecf20Sopenharmony_ci- "vdd-supply", "vbb-supply": to define two regulators for dra7xx
268c2ecf20Sopenharmony_ci- "cpu0-supply", "vbb-supply": to define two regulators for omap36xx
278c2ecf20Sopenharmony_ci
288c2ecf20Sopenharmony_ciFor each opp entry in 'operating-points-v2' table:
298c2ecf20Sopenharmony_ci- opp-supported-hw: Two bitfields indicating:
308c2ecf20Sopenharmony_ci	1. Which revision of the SoC the OPP is supported by
318c2ecf20Sopenharmony_ci	2. Which eFuse bits indicate this OPP is available
328c2ecf20Sopenharmony_ci
338c2ecf20Sopenharmony_ci	A bitwise AND is performed against these values and if any bit
348c2ecf20Sopenharmony_ci	matches, the OPP gets enabled.
358c2ecf20Sopenharmony_ci
368c2ecf20Sopenharmony_ciExample:
378c2ecf20Sopenharmony_ci--------
388c2ecf20Sopenharmony_ci
398c2ecf20Sopenharmony_ci/* From arch/arm/boot/dts/am33xx.dtsi */
408c2ecf20Sopenharmony_cicpus {
418c2ecf20Sopenharmony_ci	#address-cells = <1>;
428c2ecf20Sopenharmony_ci	#size-cells = <0>;
438c2ecf20Sopenharmony_ci	cpu@0 {
448c2ecf20Sopenharmony_ci		compatible = "arm,cortex-a8";
458c2ecf20Sopenharmony_ci		device_type = "cpu";
468c2ecf20Sopenharmony_ci		reg = <0>;
478c2ecf20Sopenharmony_ci
488c2ecf20Sopenharmony_ci		operating-points-v2 = <&cpu0_opp_table>;
498c2ecf20Sopenharmony_ci
508c2ecf20Sopenharmony_ci		clocks = <&dpll_mpu_ck>;
518c2ecf20Sopenharmony_ci		clock-names = "cpu";
528c2ecf20Sopenharmony_ci
538c2ecf20Sopenharmony_ci		clock-latency = <300000>; /* From omap-cpufreq driver */
548c2ecf20Sopenharmony_ci	};
558c2ecf20Sopenharmony_ci};
568c2ecf20Sopenharmony_ci
578c2ecf20Sopenharmony_ci/*
588c2ecf20Sopenharmony_ci * cpu0 has different OPPs depending on SoC revision and some on revisions
598c2ecf20Sopenharmony_ci * 0x2 and 0x4 have eFuse bits that indicate if they are available or not
608c2ecf20Sopenharmony_ci */
618c2ecf20Sopenharmony_cicpu0_opp_table: opp-table {
628c2ecf20Sopenharmony_ci	compatible = "operating-points-v2-ti-cpu";
638c2ecf20Sopenharmony_ci	syscon = <&scm_conf>;
648c2ecf20Sopenharmony_ci
658c2ecf20Sopenharmony_ci	/*
668c2ecf20Sopenharmony_ci	 * The three following nodes are marked with opp-suspend
678c2ecf20Sopenharmony_ci	 * because they can not be enabled simultaneously on a
688c2ecf20Sopenharmony_ci	 * single SoC.
698c2ecf20Sopenharmony_ci	 */
708c2ecf20Sopenharmony_ci	opp50-300000000 {
718c2ecf20Sopenharmony_ci		opp-hz = /bits/ 64 <300000000>;
728c2ecf20Sopenharmony_ci		opp-microvolt = <950000 931000 969000>;
738c2ecf20Sopenharmony_ci		opp-supported-hw = <0x06 0x0010>;
748c2ecf20Sopenharmony_ci		opp-suspend;
758c2ecf20Sopenharmony_ci	};
768c2ecf20Sopenharmony_ci
778c2ecf20Sopenharmony_ci	opp100-275000000 {
788c2ecf20Sopenharmony_ci		opp-hz = /bits/ 64 <275000000>;
798c2ecf20Sopenharmony_ci		opp-microvolt = <1100000 1078000 1122000>;
808c2ecf20Sopenharmony_ci		opp-supported-hw = <0x01 0x00FF>;
818c2ecf20Sopenharmony_ci		opp-suspend;
828c2ecf20Sopenharmony_ci	};
838c2ecf20Sopenharmony_ci
848c2ecf20Sopenharmony_ci	opp100-300000000 {
858c2ecf20Sopenharmony_ci		opp-hz = /bits/ 64 <300000000>;
868c2ecf20Sopenharmony_ci		opp-microvolt = <1100000 1078000 1122000>;
878c2ecf20Sopenharmony_ci		opp-supported-hw = <0x06 0x0020>;
888c2ecf20Sopenharmony_ci		opp-suspend;
898c2ecf20Sopenharmony_ci	};
908c2ecf20Sopenharmony_ci
918c2ecf20Sopenharmony_ci	opp100-500000000 {
928c2ecf20Sopenharmony_ci		opp-hz = /bits/ 64 <500000000>;
938c2ecf20Sopenharmony_ci		opp-microvolt = <1100000 1078000 1122000>;
948c2ecf20Sopenharmony_ci		opp-supported-hw = <0x01 0xFFFF>;
958c2ecf20Sopenharmony_ci	};
968c2ecf20Sopenharmony_ci
978c2ecf20Sopenharmony_ci	opp100-600000000 {
988c2ecf20Sopenharmony_ci		opp-hz = /bits/ 64 <600000000>;
998c2ecf20Sopenharmony_ci		opp-microvolt = <1100000 1078000 1122000>;
1008c2ecf20Sopenharmony_ci		opp-supported-hw = <0x06 0x0040>;
1018c2ecf20Sopenharmony_ci	};
1028c2ecf20Sopenharmony_ci
1038c2ecf20Sopenharmony_ci	opp120-600000000 {
1048c2ecf20Sopenharmony_ci		opp-hz = /bits/ 64 <600000000>;
1058c2ecf20Sopenharmony_ci		opp-microvolt = <1200000 1176000 1224000>;
1068c2ecf20Sopenharmony_ci		opp-supported-hw = <0x01 0xFFFF>;
1078c2ecf20Sopenharmony_ci	};
1088c2ecf20Sopenharmony_ci
1098c2ecf20Sopenharmony_ci	opp120-720000000 {
1108c2ecf20Sopenharmony_ci		opp-hz = /bits/ 64 <720000000>;
1118c2ecf20Sopenharmony_ci		opp-microvolt = <1200000 1176000 1224000>;
1128c2ecf20Sopenharmony_ci		opp-supported-hw = <0x06 0x0080>;
1138c2ecf20Sopenharmony_ci	};
1148c2ecf20Sopenharmony_ci
1158c2ecf20Sopenharmony_ci	oppturbo-720000000 {
1168c2ecf20Sopenharmony_ci		opp-hz = /bits/ 64 <720000000>;
1178c2ecf20Sopenharmony_ci		opp-microvolt = <1260000 1234800 1285200>;
1188c2ecf20Sopenharmony_ci		opp-supported-hw = <0x01 0xFFFF>;
1198c2ecf20Sopenharmony_ci	};
1208c2ecf20Sopenharmony_ci
1218c2ecf20Sopenharmony_ci	oppturbo-800000000 {
1228c2ecf20Sopenharmony_ci		opp-hz = /bits/ 64 <800000000>;
1238c2ecf20Sopenharmony_ci		opp-microvolt = <1260000 1234800 1285200>;
1248c2ecf20Sopenharmony_ci		opp-supported-hw = <0x06 0x0100>;
1258c2ecf20Sopenharmony_ci	};
1268c2ecf20Sopenharmony_ci
1278c2ecf20Sopenharmony_ci	oppnitro-1000000000 {
1288c2ecf20Sopenharmony_ci		opp-hz = /bits/ 64 <1000000000>;
1298c2ecf20Sopenharmony_ci		opp-microvolt = <1325000 1298500 1351500>;
1308c2ecf20Sopenharmony_ci		opp-supported-hw = <0x04 0x0200>;
1318c2ecf20Sopenharmony_ci	};
1328c2ecf20Sopenharmony_ci};
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