18c2ecf20Sopenharmony_cii.MX CPUFreq-DT OPP bindings
28c2ecf20Sopenharmony_ci================================
38c2ecf20Sopenharmony_ci
48c2ecf20Sopenharmony_ciCertain i.MX SoCs support different OPPs depending on the "market segment" and
58c2ecf20Sopenharmony_ci"speed grading" value which are written in fuses. These bits are combined with
68c2ecf20Sopenharmony_cithe opp-supported-hw values for each OPP to check if the OPP is allowed.
78c2ecf20Sopenharmony_ci
88c2ecf20Sopenharmony_ciRequired properties:
98c2ecf20Sopenharmony_ci--------------------
108c2ecf20Sopenharmony_ci
118c2ecf20Sopenharmony_ciFor each opp entry in 'operating-points-v2' table:
128c2ecf20Sopenharmony_ci- opp-supported-hw: Two bitmaps indicating:
138c2ecf20Sopenharmony_ci  - Supported speed grade mask
148c2ecf20Sopenharmony_ci  - Supported market segment mask
158c2ecf20Sopenharmony_ci    0: Consumer
168c2ecf20Sopenharmony_ci    1: Extended Consumer
178c2ecf20Sopenharmony_ci    2: Industrial
188c2ecf20Sopenharmony_ci    3: Automotive
198c2ecf20Sopenharmony_ci
208c2ecf20Sopenharmony_ciExample:
218c2ecf20Sopenharmony_ci--------
228c2ecf20Sopenharmony_ci
238c2ecf20Sopenharmony_ciopp_table {
248c2ecf20Sopenharmony_ci	compatible = "operating-points-v2";
258c2ecf20Sopenharmony_ci	opp-1000000000 {
268c2ecf20Sopenharmony_ci		opp-hz = /bits/ 64 <1000000000>;
278c2ecf20Sopenharmony_ci		/* grade >= 0, consumer only */
288c2ecf20Sopenharmony_ci		opp-supported-hw = <0xf>, <0x3>;
298c2ecf20Sopenharmony_ci	};
308c2ecf20Sopenharmony_ci
318c2ecf20Sopenharmony_ci	opp-1300000000 {
328c2ecf20Sopenharmony_ci		opp-hz = /bits/ 64 <1300000000>;
338c2ecf20Sopenharmony_ci		opp-microvolt = <1000000>;
348c2ecf20Sopenharmony_ci		/* grade >= 1, all segments */
358c2ecf20Sopenharmony_ci		opp-supported-hw = <0xe>, <0x7>;
368c2ecf20Sopenharmony_ci	};
378c2ecf20Sopenharmony_ci}
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