18c2ecf20Sopenharmony_ciGeneric cpufreq driver 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciIt is a generic DT based cpufreq driver for frequency management. It supports 48c2ecf20Sopenharmony_ciboth uniprocessor (UP) and symmetric multiprocessor (SMP) systems which share 58c2ecf20Sopenharmony_ciclock and voltage across all CPUs. 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ciBoth required and optional properties listed below must be defined 88c2ecf20Sopenharmony_ciunder node /cpus/cpu@0. 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ciRequired properties: 118c2ecf20Sopenharmony_ci- None 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_ciOptional properties: 148c2ecf20Sopenharmony_ci- operating-points: Refer to Documentation/devicetree/bindings/opp/opp.txt for 158c2ecf20Sopenharmony_ci details. OPPs *must* be supplied either via DT, i.e. this property, or 168c2ecf20Sopenharmony_ci populated at runtime. 178c2ecf20Sopenharmony_ci- clock-latency: Specify the possible maximum transition latency for clock, 188c2ecf20Sopenharmony_ci in unit of nanoseconds. 198c2ecf20Sopenharmony_ci- voltage-tolerance: Specify the CPU voltage tolerance in percentage. 208c2ecf20Sopenharmony_ci- #cooling-cells: 218c2ecf20Sopenharmony_ci Please refer to 228c2ecf20Sopenharmony_ci Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml. 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ciExamples: 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_cicpus { 278c2ecf20Sopenharmony_ci #address-cells = <1>; 288c2ecf20Sopenharmony_ci #size-cells = <0>; 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_ci cpu@0 { 318c2ecf20Sopenharmony_ci compatible = "arm,cortex-a9"; 328c2ecf20Sopenharmony_ci reg = <0>; 338c2ecf20Sopenharmony_ci next-level-cache = <&L2>; 348c2ecf20Sopenharmony_ci operating-points = < 358c2ecf20Sopenharmony_ci /* kHz uV */ 368c2ecf20Sopenharmony_ci 792000 1100000 378c2ecf20Sopenharmony_ci 396000 950000 388c2ecf20Sopenharmony_ci 198000 850000 398c2ecf20Sopenharmony_ci >; 408c2ecf20Sopenharmony_ci clock-latency = <61036>; /* two CLK32 periods */ 418c2ecf20Sopenharmony_ci #cooling-cells = <2>; 428c2ecf20Sopenharmony_ci }; 438c2ecf20Sopenharmony_ci 448c2ecf20Sopenharmony_ci cpu@1 { 458c2ecf20Sopenharmony_ci compatible = "arm,cortex-a9"; 468c2ecf20Sopenharmony_ci reg = <1>; 478c2ecf20Sopenharmony_ci next-level-cache = <&L2>; 488c2ecf20Sopenharmony_ci }; 498c2ecf20Sopenharmony_ci 508c2ecf20Sopenharmony_ci cpu@2 { 518c2ecf20Sopenharmony_ci compatible = "arm,cortex-a9"; 528c2ecf20Sopenharmony_ci reg = <2>; 538c2ecf20Sopenharmony_ci next-level-cache = <&L2>; 548c2ecf20Sopenharmony_ci }; 558c2ecf20Sopenharmony_ci 568c2ecf20Sopenharmony_ci cpu@3 { 578c2ecf20Sopenharmony_ci compatible = "arm,cortex-a9"; 588c2ecf20Sopenharmony_ci reg = <3>; 598c2ecf20Sopenharmony_ci next-level-cache = <&L2>; 608c2ecf20Sopenharmony_ci }; 618c2ecf20Sopenharmony_ci}; 62