18c2ecf20Sopenharmony_ciBroadcom AVS mail box and interrupt register bindings 28c2ecf20Sopenharmony_ci===================================================== 38c2ecf20Sopenharmony_ci 48c2ecf20Sopenharmony_ciA total of three DT nodes are required. One node (brcm,avs-cpu-data-mem) 58c2ecf20Sopenharmony_cireferences the mailbox register used to communicate with the AVS CPU[1]. The 68c2ecf20Sopenharmony_cisecond node (brcm,avs-cpu-l2-intr) is required to trigger an interrupt on 78c2ecf20Sopenharmony_cithe AVS CPU. The interrupt tells the AVS CPU that it needs to process a 88c2ecf20Sopenharmony_cicommand sent to it by a driver. Interrupting the AVS CPU is mandatory for 98c2ecf20Sopenharmony_cicommands to be processed. 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ciThe interface also requires a reference to the AVS host interrupt controller, 128c2ecf20Sopenharmony_ciso a driver can react to interrupts generated by the AVS CPU whenever a command 138c2ecf20Sopenharmony_cihas been processed. See [2] for more information on the brcm,l2-intc node. 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_ci[1] The AVS CPU is an independent co-processor that runs proprietary 168c2ecf20Sopenharmony_cifirmware. On some SoCs, this firmware supports DFS and DVFS in addition to 178c2ecf20Sopenharmony_ciAdaptive Voltage Scaling. 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ci[2] Documentation/devicetree/bindings/interrupt-controller/brcm,l2-intc.txt 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ciNode brcm,avs-cpu-data-mem 238c2ecf20Sopenharmony_ci-------------------------- 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_ciRequired properties: 268c2ecf20Sopenharmony_ci- compatible: must include: brcm,avs-cpu-data-mem and 278c2ecf20Sopenharmony_ci should include: one of brcm,bcm7271-avs-cpu-data-mem or 288c2ecf20Sopenharmony_ci brcm,bcm7268-avs-cpu-data-mem 298c2ecf20Sopenharmony_ci- reg: Specifies base physical address and size of the registers. 308c2ecf20Sopenharmony_ci- interrupts: The interrupt that the AVS CPU will use to interrupt the host 318c2ecf20Sopenharmony_ci when a command completed. 328c2ecf20Sopenharmony_ci- interrupt-names: The name of the interrupt used to interrupt the host. 338c2ecf20Sopenharmony_ci 348c2ecf20Sopenharmony_ciOptional properties: 358c2ecf20Sopenharmony_ci- None 368c2ecf20Sopenharmony_ci 378c2ecf20Sopenharmony_ciNode brcm,avs-cpu-l2-intr 388c2ecf20Sopenharmony_ci------------------------- 398c2ecf20Sopenharmony_ci 408c2ecf20Sopenharmony_ciRequired properties: 418c2ecf20Sopenharmony_ci- compatible: must include: brcm,avs-cpu-l2-intr and 428c2ecf20Sopenharmony_ci should include: one of brcm,bcm7271-avs-cpu-l2-intr or 438c2ecf20Sopenharmony_ci brcm,bcm7268-avs-cpu-l2-intr 448c2ecf20Sopenharmony_ci- reg: Specifies base physical address and size of the registers. 458c2ecf20Sopenharmony_ci 468c2ecf20Sopenharmony_ciOptional properties: 478c2ecf20Sopenharmony_ci- None 488c2ecf20Sopenharmony_ci 498c2ecf20Sopenharmony_ci 508c2ecf20Sopenharmony_ciExample 518c2ecf20Sopenharmony_ci======= 528c2ecf20Sopenharmony_ci 538c2ecf20Sopenharmony_ci avs_host_l2_intc: interrupt-controller@f04d1200 { 548c2ecf20Sopenharmony_ci #interrupt-cells = <1>; 558c2ecf20Sopenharmony_ci compatible = "brcm,l2-intc"; 568c2ecf20Sopenharmony_ci interrupt-parent = <&intc>; 578c2ecf20Sopenharmony_ci reg = <0xf04d1200 0x48>; 588c2ecf20Sopenharmony_ci interrupt-controller; 598c2ecf20Sopenharmony_ci interrupts = <0x0 0x19 0x0>; 608c2ecf20Sopenharmony_ci interrupt-names = "avs"; 618c2ecf20Sopenharmony_ci }; 628c2ecf20Sopenharmony_ci 638c2ecf20Sopenharmony_ci avs-cpu-data-mem@f04c4000 { 648c2ecf20Sopenharmony_ci compatible = "brcm,bcm7271-avs-cpu-data-mem", 658c2ecf20Sopenharmony_ci "brcm,avs-cpu-data-mem"; 668c2ecf20Sopenharmony_ci reg = <0xf04c4000 0x60>; 678c2ecf20Sopenharmony_ci interrupts = <0x1a>; 688c2ecf20Sopenharmony_ci interrupt-parent = <&avs_host_l2_intc>; 698c2ecf20Sopenharmony_ci interrupt-names = "sw_intr"; 708c2ecf20Sopenharmony_ci }; 718c2ecf20Sopenharmony_ci 728c2ecf20Sopenharmony_ci avs-cpu-l2-intr@f04d1100 { 738c2ecf20Sopenharmony_ci compatible = "brcm,bcm7271-avs-cpu-l2-intr", 748c2ecf20Sopenharmony_ci "brcm,avs-cpu-l2-intr"; 758c2ecf20Sopenharmony_ci reg = <0xf04d1100 0x10>; 768c2ecf20Sopenharmony_ci }; 77