18c2ecf20Sopenharmony_ciTexas Instruments clkctrl clock binding
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ciTexas Instruments SoCs can have a clkctrl clock controller for each
48c2ecf20Sopenharmony_ciinterconnect target module. The clkctrl clock controller manages functional
58c2ecf20Sopenharmony_ciand interface clocks for each module. Each clkctrl controller can also
68c2ecf20Sopenharmony_cigate one or more optional functional clocks for a module, and can have one
78c2ecf20Sopenharmony_cior more clock muxes. There is a clkctrl clock controller typically for each
88c2ecf20Sopenharmony_ciinterconnect target module on omap4 and later variants.
98c2ecf20Sopenharmony_ci
108c2ecf20Sopenharmony_ciThe clock consumers can specify the index of the clkctrl clock using
118c2ecf20Sopenharmony_cithe hardware offset from the clkctrl instance register space. The optional
128c2ecf20Sopenharmony_ciclocks can be specified by clkctrl hardware offset and the index of the
138c2ecf20Sopenharmony_cioptional clock.
148c2ecf20Sopenharmony_ci
158c2ecf20Sopenharmony_ciFor more information, please see the Linux clock framework binding at
168c2ecf20Sopenharmony_ciDocumentation/devicetree/bindings/clock/clock-bindings.txt.
178c2ecf20Sopenharmony_ci
188c2ecf20Sopenharmony_ciRequired properties :
198c2ecf20Sopenharmony_ci- compatible : shall be "ti,clkctrl" or a clock domain specific name:
208c2ecf20Sopenharmony_ci	       "ti,clkctrl-l4-cfg"
218c2ecf20Sopenharmony_ci	       "ti,clkctrl-l4-per"
228c2ecf20Sopenharmony_ci	       "ti,clkctrl-l4-secure"
238c2ecf20Sopenharmony_ci	       "ti,clkctrl-l4-wkup"
248c2ecf20Sopenharmony_ci- #clock-cells : shall contain 2 with the first entry being the instance
258c2ecf20Sopenharmony_ci		 offset from the clock domain base and the second being the
268c2ecf20Sopenharmony_ci		 clock index
278c2ecf20Sopenharmony_ci- reg : clock registers
288c2ecf20Sopenharmony_ci
298c2ecf20Sopenharmony_ciExample: Clock controller node on omap 4430:
308c2ecf20Sopenharmony_ci
318c2ecf20Sopenharmony_ci&cm2 {
328c2ecf20Sopenharmony_ci	l4per: cm@1400 {
338c2ecf20Sopenharmony_ci		cm_l4per@0 {
348c2ecf20Sopenharmony_ci			cm_l4per_clkctrl: clock@20 {
358c2ecf20Sopenharmony_ci				compatible = "ti,clkctrl-l4-per", "ti,clkctrl";
368c2ecf20Sopenharmony_ci				reg = <0x20 0x1b0>;
378c2ecf20Sopenharmony_ci				#clock-cells = <2>;
388c2ecf20Sopenharmony_ci			};
398c2ecf20Sopenharmony_ci		};
408c2ecf20Sopenharmony_ci	};
418c2ecf20Sopenharmony_ci};
428c2ecf20Sopenharmony_ci
438c2ecf20Sopenharmony_ciExample: Preprocessor helper macros in dt-bindings/clock/ti-clkctrl.h
448c2ecf20Sopenharmony_ci
458c2ecf20Sopenharmony_ci#define OMAP4_CLKCTRL_OFFSET		0x20
468c2ecf20Sopenharmony_ci#define OMAP4_CLKCTRL_INDEX(offset)	((offset) - OMAP4_CLKCTRL_OFFSET)
478c2ecf20Sopenharmony_ci#define MODULEMODE_HWCTRL		1
488c2ecf20Sopenharmony_ci#define MODULEMODE_SWCTRL		2
498c2ecf20Sopenharmony_ci
508c2ecf20Sopenharmony_ci#define OMAP4_GPTIMER10_CLKTRL		OMAP4_CLKCTRL_INDEX(0x28)
518c2ecf20Sopenharmony_ci#define OMAP4_GPTIMER11_CLKTRL		OMAP4_CLKCTRL_INDEX(0x30)
528c2ecf20Sopenharmony_ci#define OMAP4_GPTIMER2_CLKTRL		OMAP4_CLKCTRL_INDEX(0x38)
538c2ecf20Sopenharmony_ci...
548c2ecf20Sopenharmony_ci#define OMAP4_GPIO2_CLKCTRL		OMAP_CLKCTRL_INDEX(0x60)
558c2ecf20Sopenharmony_ci
568c2ecf20Sopenharmony_ciExample: Clock consumer node for GPIO2:
578c2ecf20Sopenharmony_ci
588c2ecf20Sopenharmony_ci&gpio2 {
598c2ecf20Sopenharmony_ci       clocks = <&cm_l4per_clkctrl OMAP4_GPIO2_CLKCTRL 0
608c2ecf20Sopenharmony_ci		 &cm_l4per_clkctrl OMAP4_GPIO2_CLKCTRL 8>;
618c2ecf20Sopenharmony_ci};
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