18c2ecf20Sopenharmony_ci* Samsung S5P6442/S5PC110/S5PV210 Clock Controller 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciSamsung S5P6442, S5PC110 and S5PV210 SoCs contain integrated clock 48c2ecf20Sopenharmony_cicontroller, which generates and supplies clock to various controllers 58c2ecf20Sopenharmony_ciwithin the SoC. 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ciRequired Properties: 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_ci- compatible: should be one of following: 108c2ecf20Sopenharmony_ci - "samsung,s5pv210-clock" : for clock controller of Samsung 118c2ecf20Sopenharmony_ci S5PC110/S5PV210 SoCs, 128c2ecf20Sopenharmony_ci - "samsung,s5p6442-clock" : for clock controller of Samsung 138c2ecf20Sopenharmony_ci S5P6442 SoC. 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_ci- reg: physical base address of the controller and length of memory mapped 168c2ecf20Sopenharmony_ci region. 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_ci- #clock-cells: should be 1. 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ciAll available clocks are defined as preprocessor macros in 218c2ecf20Sopenharmony_cidt-bindings/clock/s5pv210.h header and can be used in device tree sources. 228c2ecf20Sopenharmony_ci 238c2ecf20Sopenharmony_ciExternal clocks: 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_ciThere are several clocks that are generated outside the SoC. It is expected 268c2ecf20Sopenharmony_cithat they are defined using standard clock bindings with following 278c2ecf20Sopenharmony_ciclock-output-names: 288c2ecf20Sopenharmony_ci - "xxti": external crystal oscillator connected to XXTI and XXTO pins of 298c2ecf20Sopenharmony_cithe SoC, 308c2ecf20Sopenharmony_ci - "xusbxti": external crystal oscillator connected to XUSBXTI and XUSBXTO 318c2ecf20Sopenharmony_cipins of the SoC, 328c2ecf20Sopenharmony_ci 338c2ecf20Sopenharmony_ciA subset of above clocks available on given board shall be specified in 348c2ecf20Sopenharmony_ciboard device tree, including the system base clock, as selected by XOM[0] 358c2ecf20Sopenharmony_cipin of the SoC. Refer to generic fixed rate clock bindings 368c2ecf20Sopenharmony_cidocumentation[1] for more information how to specify these clocks. 378c2ecf20Sopenharmony_ci 388c2ecf20Sopenharmony_ci[1] Documentation/devicetree/bindings/clock/fixed-clock.yaml 398c2ecf20Sopenharmony_ci 408c2ecf20Sopenharmony_ciExample: Clock controller node: 418c2ecf20Sopenharmony_ci 428c2ecf20Sopenharmony_ci clock: clock-controller@7e00f000 { 438c2ecf20Sopenharmony_ci compatible = "samsung,s5pv210-clock"; 448c2ecf20Sopenharmony_ci reg = <0x7e00f000 0x1000>; 458c2ecf20Sopenharmony_ci #clock-cells = <1>; 468c2ecf20Sopenharmony_ci }; 478c2ecf20Sopenharmony_ci 488c2ecf20Sopenharmony_ciExample: Required external clocks: 498c2ecf20Sopenharmony_ci 508c2ecf20Sopenharmony_ci xxti: clock-xxti { 518c2ecf20Sopenharmony_ci compatible = "fixed-clock"; 528c2ecf20Sopenharmony_ci clock-output-names = "xxti"; 538c2ecf20Sopenharmony_ci clock-frequency = <24000000>; 548c2ecf20Sopenharmony_ci #clock-cells = <0>; 558c2ecf20Sopenharmony_ci }; 568c2ecf20Sopenharmony_ci 578c2ecf20Sopenharmony_ci xusbxti: clock-xusbxti { 588c2ecf20Sopenharmony_ci compatible = "fixed-clock"; 598c2ecf20Sopenharmony_ci clock-output-names = "xusbxti"; 608c2ecf20Sopenharmony_ci clock-frequency = <24000000>; 618c2ecf20Sopenharmony_ci #clock-cells = <0>; 628c2ecf20Sopenharmony_ci }; 638c2ecf20Sopenharmony_ci 648c2ecf20Sopenharmony_ciExample: UART controller node that consumes the clock generated by the clock 658c2ecf20Sopenharmony_ci controller (refer to the standard clock bindings for information about 668c2ecf20Sopenharmony_ci "clocks" and "clock-names" properties): 678c2ecf20Sopenharmony_ci 688c2ecf20Sopenharmony_ci uart0: serial@e2900000 { 698c2ecf20Sopenharmony_ci compatible = "samsung,s5pv210-uart"; 708c2ecf20Sopenharmony_ci reg = <0xe2900000 0x400>; 718c2ecf20Sopenharmony_ci interrupt-parent = <&vic1>; 728c2ecf20Sopenharmony_ci interrupts = <10>; 738c2ecf20Sopenharmony_ci clock-names = "uart", "clk_uart_baud0", 748c2ecf20Sopenharmony_ci "clk_uart_baud1"; 758c2ecf20Sopenharmony_ci clocks = <&clocks UART0>, <&clocks UART0>, 768c2ecf20Sopenharmony_ci <&clocks SCLK_UART0>; 778c2ecf20Sopenharmony_ci }; 78