18c2ecf20Sopenharmony_ciQualcomm LPASS Clock & Reset Controller Binding 28c2ecf20Sopenharmony_ci------------------------------------------------ 38c2ecf20Sopenharmony_ci 48c2ecf20Sopenharmony_ciRequired properties : 58c2ecf20Sopenharmony_ci- compatible : shall contain only one of the following: 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ci "qcom,lcc-msm8960" 88c2ecf20Sopenharmony_ci "qcom,lcc-apq8064" 98c2ecf20Sopenharmony_ci "qcom,lcc-ipq8064" 108c2ecf20Sopenharmony_ci "qcom,lcc-mdm9615" 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_ci- reg : shall contain base register location and length 138c2ecf20Sopenharmony_ci- #clock-cells : shall contain 1 148c2ecf20Sopenharmony_ci- #reset-cells : shall contain 1 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_ciExample: 178c2ecf20Sopenharmony_ci clock-controller@28000000 { 188c2ecf20Sopenharmony_ci compatible = "qcom,lcc-ipq8064"; 198c2ecf20Sopenharmony_ci reg = <0x28000000 0x1000>; 208c2ecf20Sopenharmony_ci #clock-cells = <1>; 218c2ecf20Sopenharmony_ci #reset-cells = <1>; 228c2ecf20Sopenharmony_ci }; 23