18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0-only 28c2ecf20Sopenharmony_ci%YAML 1.2 38c2ecf20Sopenharmony_ci--- 48c2ecf20Sopenharmony_ci$id: http://devicetree.org/schemas/clock/qcom,gcc-sm8150.yaml# 58c2ecf20Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_cititle: Qualcomm Global Clock & Reset Controller Binding for SM8150 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_cimaintainers: 108c2ecf20Sopenharmony_ci - Stephen Boyd <sboyd@kernel.org> 118c2ecf20Sopenharmony_ci - Taniya Das <tdas@codeaurora.org> 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_cidescription: | 148c2ecf20Sopenharmony_ci Qualcomm global clock control module which supports the clocks, resets and 158c2ecf20Sopenharmony_ci power domains on SM8150. 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ci See also: 188c2ecf20Sopenharmony_ci - dt-bindings/clock/qcom,gcc-sm8150.h 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ciproperties: 218c2ecf20Sopenharmony_ci compatible: 228c2ecf20Sopenharmony_ci const: qcom,gcc-sm8150 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci clocks: 258c2ecf20Sopenharmony_ci items: 268c2ecf20Sopenharmony_ci - description: Board XO source 278c2ecf20Sopenharmony_ci - description: Sleep clock source 288c2ecf20Sopenharmony_ci 298c2ecf20Sopenharmony_ci clock-names: 308c2ecf20Sopenharmony_ci items: 318c2ecf20Sopenharmony_ci - const: bi_tcxo 328c2ecf20Sopenharmony_ci - const: sleep_clk 338c2ecf20Sopenharmony_ci 348c2ecf20Sopenharmony_ci '#clock-cells': 358c2ecf20Sopenharmony_ci const: 1 368c2ecf20Sopenharmony_ci 378c2ecf20Sopenharmony_ci '#reset-cells': 388c2ecf20Sopenharmony_ci const: 1 398c2ecf20Sopenharmony_ci 408c2ecf20Sopenharmony_ci '#power-domain-cells': 418c2ecf20Sopenharmony_ci const: 1 428c2ecf20Sopenharmony_ci 438c2ecf20Sopenharmony_ci reg: 448c2ecf20Sopenharmony_ci maxItems: 1 458c2ecf20Sopenharmony_ci 468c2ecf20Sopenharmony_ci protected-clocks: 478c2ecf20Sopenharmony_ci description: 488c2ecf20Sopenharmony_ci Protected clock specifier list as per common clock binding. 498c2ecf20Sopenharmony_ci 508c2ecf20Sopenharmony_cirequired: 518c2ecf20Sopenharmony_ci - compatible 528c2ecf20Sopenharmony_ci - clocks 538c2ecf20Sopenharmony_ci - clock-names 548c2ecf20Sopenharmony_ci - reg 558c2ecf20Sopenharmony_ci - '#clock-cells' 568c2ecf20Sopenharmony_ci - '#reset-cells' 578c2ecf20Sopenharmony_ci - '#power-domain-cells' 588c2ecf20Sopenharmony_ci 598c2ecf20Sopenharmony_ciadditionalProperties: false 608c2ecf20Sopenharmony_ci 618c2ecf20Sopenharmony_ciexamples: 628c2ecf20Sopenharmony_ci - | 638c2ecf20Sopenharmony_ci #include <dt-bindings/clock/qcom,rpmh.h> 648c2ecf20Sopenharmony_ci clock-controller@100000 { 658c2ecf20Sopenharmony_ci compatible = "qcom,gcc-sm8150"; 668c2ecf20Sopenharmony_ci reg = <0x00100000 0x1f0000>; 678c2ecf20Sopenharmony_ci clocks = <&rpmhcc RPMH_CXO_CLK>, 688c2ecf20Sopenharmony_ci <&sleep_clk>; 698c2ecf20Sopenharmony_ci clock-names = "bi_tcxo", "sleep_clk"; 708c2ecf20Sopenharmony_ci #clock-cells = <1>; 718c2ecf20Sopenharmony_ci #reset-cells = <1>; 728c2ecf20Sopenharmony_ci #power-domain-cells = <1>; 738c2ecf20Sopenharmony_ci }; 748c2ecf20Sopenharmony_ci... 75