18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0-only 28c2ecf20Sopenharmony_ci%YAML 1.2 38c2ecf20Sopenharmony_ci--- 48c2ecf20Sopenharmony_ci$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8996.yaml# 58c2ecf20Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_cititle: Qualcomm Global Clock & Reset Controller Binding for MSM8996 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_cimaintainers: 108c2ecf20Sopenharmony_ci - Stephen Boyd <sboyd@kernel.org> 118c2ecf20Sopenharmony_ci - Taniya Das <tdas@codeaurora.org> 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_cidescription: | 148c2ecf20Sopenharmony_ci Qualcomm global clock control module which supports the clocks, resets and 158c2ecf20Sopenharmony_ci power domains on MSM8996. 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ci See also: 188c2ecf20Sopenharmony_ci - dt-bindings/clock/qcom,gcc-msm8996.h 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ciproperties: 218c2ecf20Sopenharmony_ci compatible: 228c2ecf20Sopenharmony_ci const: qcom,gcc-msm8996 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci clocks: 258c2ecf20Sopenharmony_ci minItems: 3 268c2ecf20Sopenharmony_ci items: 278c2ecf20Sopenharmony_ci - description: XO source 288c2ecf20Sopenharmony_ci - description: Second XO source 298c2ecf20Sopenharmony_ci - description: Sleep clock source 308c2ecf20Sopenharmony_ci - description: PCIe 0 PIPE clock (optional) 318c2ecf20Sopenharmony_ci - description: PCIe 1 PIPE clock (optional) 328c2ecf20Sopenharmony_ci - description: PCIe 2 PIPE clock (optional) 338c2ecf20Sopenharmony_ci - description: USB3 PIPE clock (optional) 348c2ecf20Sopenharmony_ci - description: UFS RX symbol 0 clock (optional) 358c2ecf20Sopenharmony_ci - description: UFS RX symbol 1 clock (optional) 368c2ecf20Sopenharmony_ci - description: UFS TX symbol 0 clock (optional) 378c2ecf20Sopenharmony_ci 388c2ecf20Sopenharmony_ci clock-names: 398c2ecf20Sopenharmony_ci minItems: 3 408c2ecf20Sopenharmony_ci items: 418c2ecf20Sopenharmony_ci - const: cxo 428c2ecf20Sopenharmony_ci - const: cxo2 438c2ecf20Sopenharmony_ci - const: sleep_clk 448c2ecf20Sopenharmony_ci - const: pcie_0_pipe_clk_src 458c2ecf20Sopenharmony_ci - const: pcie_1_pipe_clk_src 468c2ecf20Sopenharmony_ci - const: pcie_2_pipe_clk_src 478c2ecf20Sopenharmony_ci - const: usb3_phy_pipe_clk_src 488c2ecf20Sopenharmony_ci - const: ufs_rx_symbol_0_clk_src 498c2ecf20Sopenharmony_ci - const: ufs_rx_symbol_1_clk_src 508c2ecf20Sopenharmony_ci - const: ufs_tx_symbol_0_clk_src 518c2ecf20Sopenharmony_ci 528c2ecf20Sopenharmony_ci '#clock-cells': 538c2ecf20Sopenharmony_ci const: 1 548c2ecf20Sopenharmony_ci 558c2ecf20Sopenharmony_ci '#reset-cells': 568c2ecf20Sopenharmony_ci const: 1 578c2ecf20Sopenharmony_ci 588c2ecf20Sopenharmony_ci '#power-domain-cells': 598c2ecf20Sopenharmony_ci const: 1 608c2ecf20Sopenharmony_ci 618c2ecf20Sopenharmony_ci reg: 628c2ecf20Sopenharmony_ci maxItems: 1 638c2ecf20Sopenharmony_ci 648c2ecf20Sopenharmony_ci protected-clocks: 658c2ecf20Sopenharmony_ci description: 668c2ecf20Sopenharmony_ci Protected clock specifier list as per common clock binding. 678c2ecf20Sopenharmony_ci 688c2ecf20Sopenharmony_cirequired: 698c2ecf20Sopenharmony_ci - compatible 708c2ecf20Sopenharmony_ci - reg 718c2ecf20Sopenharmony_ci - '#clock-cells' 728c2ecf20Sopenharmony_ci - '#reset-cells' 738c2ecf20Sopenharmony_ci - '#power-domain-cells' 748c2ecf20Sopenharmony_ci 758c2ecf20Sopenharmony_ciadditionalProperties: false 768c2ecf20Sopenharmony_ci 778c2ecf20Sopenharmony_ciexamples: 788c2ecf20Sopenharmony_ci - | 798c2ecf20Sopenharmony_ci clock-controller@300000 { 808c2ecf20Sopenharmony_ci compatible = "qcom,gcc-msm8996"; 818c2ecf20Sopenharmony_ci #clock-cells = <1>; 828c2ecf20Sopenharmony_ci #reset-cells = <1>; 838c2ecf20Sopenharmony_ci #power-domain-cells = <1>; 848c2ecf20Sopenharmony_ci reg = <0x300000 0x90000>; 858c2ecf20Sopenharmony_ci }; 868c2ecf20Sopenharmony_ci... 87