18c2ecf20Sopenharmony_ciBinding for Qualcomm Atheros AR7xxx/AR9XXX PLL controller 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciThe PPL controller provides the 3 main clocks of the SoC: CPU, DDR and AHB. 48c2ecf20Sopenharmony_ci 58c2ecf20Sopenharmony_ciRequired Properties: 68c2ecf20Sopenharmony_ci- compatible: has to be "qca,<soctype>-pll" and one of the following 78c2ecf20Sopenharmony_ci fallbacks: 88c2ecf20Sopenharmony_ci - "qca,ar7100-pll" 98c2ecf20Sopenharmony_ci - "qca,ar7240-pll" 108c2ecf20Sopenharmony_ci - "qca,ar9130-pll" 118c2ecf20Sopenharmony_ci - "qca,ar9330-pll" 128c2ecf20Sopenharmony_ci - "qca,ar9340-pll" 138c2ecf20Sopenharmony_ci - "qca,qca9550-pll" 148c2ecf20Sopenharmony_ci- reg: Base address and size of the controllers memory area 158c2ecf20Sopenharmony_ci- clock-names: Name of the input clock, has to be "ref" 168c2ecf20Sopenharmony_ci- clocks: phandle of the external reference clock 178c2ecf20Sopenharmony_ci- #clock-cells: has to be one 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ciOptional properties: 208c2ecf20Sopenharmony_ci- clock-output-names: should be "cpu", "ddr", "ahb" 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ciExample: 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci pll-controller@18050000 { 258c2ecf20Sopenharmony_ci compatible = "qca,ar9132-pll", "qca,ar9130-pll"; 268c2ecf20Sopenharmony_ci reg = <0x18050000 0x20>; 278c2ecf20Sopenharmony_ci 288c2ecf20Sopenharmony_ci clock-names = "ref"; 298c2ecf20Sopenharmony_ci clocks = <&extosc>; 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ci #clock-cells = <1>; 328c2ecf20Sopenharmony_ci clock-output-names = "cpu", "ddr", "ahb"; 338c2ecf20Sopenharmony_ci }; 34