18c2ecf20Sopenharmony_ci* NXP LPC1850 CREG clocks 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciThe NXP LPC18xx/43xx CREG (Configuration Registers) block contains 48c2ecf20Sopenharmony_cicontrol registers for two low speed clocks. One of the clocks is a 58c2ecf20Sopenharmony_ci32 kHz oscillator driver with power up/down and clock gating. Next 68c2ecf20Sopenharmony_ciis a fixed divider that creates a 1 kHz clock from the 32 kHz osc. 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ciThese clocks are used by the RTC and the Event Router peripherials. 98c2ecf20Sopenharmony_ciThe 32 kHz can also be routed to other peripherials to enable low 108c2ecf20Sopenharmony_cipower modes. 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_ciThis binding uses the common clock binding: 138c2ecf20Sopenharmony_ci Documentation/devicetree/bindings/clock/clock-bindings.txt 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_ciRequired properties: 168c2ecf20Sopenharmony_ci- compatible: 178c2ecf20Sopenharmony_ci Should be "nxp,lpc1850-creg-clk" 188c2ecf20Sopenharmony_ci- #clock-cells: 198c2ecf20Sopenharmony_ci Shall have value <1>. 208c2ecf20Sopenharmony_ci- clocks: 218c2ecf20Sopenharmony_ci Shall contain a phandle to the fixed 32 kHz crystal. 228c2ecf20Sopenharmony_ci 238c2ecf20Sopenharmony_ciThe creg-clk node must be a child of the creg syscon node. 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_ciThe following clocks are available from the clock node. 268c2ecf20Sopenharmony_ci 278c2ecf20Sopenharmony_ciClock ID Name 288c2ecf20Sopenharmony_ci 0 1 kHz clock 298c2ecf20Sopenharmony_ci 1 32 kHz Oscillator 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ciExample: 328c2ecf20Sopenharmony_cisoc { 338c2ecf20Sopenharmony_ci creg: syscon@40043000 { 348c2ecf20Sopenharmony_ci compatible = "nxp,lpc1850-creg", "syscon", "simple-mfd"; 358c2ecf20Sopenharmony_ci reg = <0x40043000 0x1000>; 368c2ecf20Sopenharmony_ci 378c2ecf20Sopenharmony_ci creg_clk: clock-controller { 388c2ecf20Sopenharmony_ci compatible = "nxp,lpc1850-creg-clk"; 398c2ecf20Sopenharmony_ci clocks = <&xtal32>; 408c2ecf20Sopenharmony_ci #clock-cells = <1>; 418c2ecf20Sopenharmony_ci }; 428c2ecf20Sopenharmony_ci 438c2ecf20Sopenharmony_ci ... 448c2ecf20Sopenharmony_ci }; 458c2ecf20Sopenharmony_ci 468c2ecf20Sopenharmony_ci rtc: rtc@40046000 { 478c2ecf20Sopenharmony_ci ... 488c2ecf20Sopenharmony_ci clocks = <&creg_clk 0>, <&ccu1 CLK_CPU_BUS>; 498c2ecf20Sopenharmony_ci clock-names = "rtc", "reg"; 508c2ecf20Sopenharmony_ci ... 518c2ecf20Sopenharmony_ci }; 528c2ecf20Sopenharmony_ci}; 53