18c2ecf20Sopenharmony_ciDevice Tree Clock bindings for Intel's SoCFPGA Stratix10 platform
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38c2ecf20Sopenharmony_ciThis binding uses the common clock binding[1].
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58c2ecf20Sopenharmony_ci[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
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78c2ecf20Sopenharmony_ciRequired properties:
88c2ecf20Sopenharmony_ci- compatible : shall be
98c2ecf20Sopenharmony_ci	"intel,stratix10-clkmgr"
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118c2ecf20Sopenharmony_ci- reg : shall be the control register offset from CLOCK_MANAGER's base for the clock.
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138c2ecf20Sopenharmony_ci- #clock-cells : from common clock binding, shall be set to 1.
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158c2ecf20Sopenharmony_ciExample:
168c2ecf20Sopenharmony_ci	clkmgr: clock-controller@ffd10000 {
178c2ecf20Sopenharmony_ci		compatible = "intel,stratix10-clkmgr";
188c2ecf20Sopenharmony_ci		reg = <0xffd10000 0x1000>;
198c2ecf20Sopenharmony_ci		#clock-cells = <1>;
208c2ecf20Sopenharmony_ci	};
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