18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 28c2ecf20Sopenharmony_ci%YAML 1.2 38c2ecf20Sopenharmony_ci--- 48c2ecf20Sopenharmony_ci$id: http://devicetree.org/schemas/clock/imx27-clock.yaml# 58c2ecf20Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_cititle: Clock bindings for Freescale i.MX27 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_cimaintainers: 108c2ecf20Sopenharmony_ci - Fabio Estevam <fabio.estevam@nxp.com> 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_cidescription: | 138c2ecf20Sopenharmony_ci The clock consumer should specify the desired clock by having the clock 148c2ecf20Sopenharmony_ci ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx27-clock.h 158c2ecf20Sopenharmony_ci for the full list of i.MX27 clock IDs. 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ciproperties: 188c2ecf20Sopenharmony_ci compatible: 198c2ecf20Sopenharmony_ci const: fsl,imx27-ccm 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ci reg: 228c2ecf20Sopenharmony_ci maxItems: 1 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci interrupts: 258c2ecf20Sopenharmony_ci maxItems: 1 268c2ecf20Sopenharmony_ci 278c2ecf20Sopenharmony_ci '#clock-cells': 288c2ecf20Sopenharmony_ci const: 1 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_cirequired: 318c2ecf20Sopenharmony_ci - compatible 328c2ecf20Sopenharmony_ci - reg 338c2ecf20Sopenharmony_ci - '#clock-cells' 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_ciadditionalProperties: false 368c2ecf20Sopenharmony_ci 378c2ecf20Sopenharmony_ciexamples: 388c2ecf20Sopenharmony_ci - | 398c2ecf20Sopenharmony_ci #include <dt-bindings/clock/imx27-clock.h> 408c2ecf20Sopenharmony_ci 418c2ecf20Sopenharmony_ci clock-controller@10027000 { 428c2ecf20Sopenharmony_ci compatible = "fsl,imx27-ccm"; 438c2ecf20Sopenharmony_ci reg = <0x10027000 0x1000>; 448c2ecf20Sopenharmony_ci interrupts = <31>; 458c2ecf20Sopenharmony_ci #clock-cells = <1>; 468c2ecf20Sopenharmony_ci }; 478c2ecf20Sopenharmony_ci 488c2ecf20Sopenharmony_ci serial@1000a000 { 498c2ecf20Sopenharmony_ci compatible = "fsl,imx27-uart", "fsl,imx21-uart"; 508c2ecf20Sopenharmony_ci reg = <0x1000a000 0x1000>; 518c2ecf20Sopenharmony_ci interrupts = <20>; 528c2ecf20Sopenharmony_ci clocks = <&clks IMX27_CLK_UART1_IPG_GATE>, 538c2ecf20Sopenharmony_ci <&clks IMX27_CLK_PER1_GATE>; 548c2ecf20Sopenharmony_ci clock-names = "ipg", "per"; 558c2ecf20Sopenharmony_ci }; 56