18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
28c2ecf20Sopenharmony_ci%YAML 1.2
38c2ecf20Sopenharmony_ci---
48c2ecf20Sopenharmony_ci$id: http://devicetree.org/schemas/clock/imx21-clock.yaml#
58c2ecf20Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_cititle: Clock bindings for Freescale i.MX21
88c2ecf20Sopenharmony_ci
98c2ecf20Sopenharmony_cimaintainers:
108c2ecf20Sopenharmony_ci  - Alexander Shiyan <shc_work@mail.ru>
118c2ecf20Sopenharmony_ci
128c2ecf20Sopenharmony_cidescription: |
138c2ecf20Sopenharmony_ci  The clock consumer should specify the desired clock by having the clock
148c2ecf20Sopenharmony_ci  ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx21-clock.h
158c2ecf20Sopenharmony_ci  for the full list of i.MX21 clock IDs.
168c2ecf20Sopenharmony_ci
178c2ecf20Sopenharmony_ciproperties:
188c2ecf20Sopenharmony_ci  compatible:
198c2ecf20Sopenharmony_ci    const: fsl,imx21-ccm
208c2ecf20Sopenharmony_ci
218c2ecf20Sopenharmony_ci  reg:
228c2ecf20Sopenharmony_ci    maxItems: 1
238c2ecf20Sopenharmony_ci
248c2ecf20Sopenharmony_ci  '#clock-cells':
258c2ecf20Sopenharmony_ci    const: 1
268c2ecf20Sopenharmony_ci
278c2ecf20Sopenharmony_cirequired:
288c2ecf20Sopenharmony_ci  - compatible
298c2ecf20Sopenharmony_ci  - reg
308c2ecf20Sopenharmony_ci  - '#clock-cells'
318c2ecf20Sopenharmony_ci
328c2ecf20Sopenharmony_ciadditionalProperties: false
338c2ecf20Sopenharmony_ci
348c2ecf20Sopenharmony_ciexamples:
358c2ecf20Sopenharmony_ci  - |
368c2ecf20Sopenharmony_ci    #include <dt-bindings/clock/imx21-clock.h>
378c2ecf20Sopenharmony_ci
388c2ecf20Sopenharmony_ci    clock-controller@10027000 {
398c2ecf20Sopenharmony_ci        compatible = "fsl,imx21-ccm";
408c2ecf20Sopenharmony_ci        reg = <0x10027000 0x800>;
418c2ecf20Sopenharmony_ci        #clock-cells = <1>;
428c2ecf20Sopenharmony_ci    };
438c2ecf20Sopenharmony_ci
448c2ecf20Sopenharmony_ci    serial@1000a000 {
458c2ecf20Sopenharmony_ci        compatible = "fsl,imx21-uart";
468c2ecf20Sopenharmony_ci        reg = <0x1000a000 0x1000>;
478c2ecf20Sopenharmony_ci        interrupts = <20>;
488c2ecf20Sopenharmony_ci        clocks = <&clks IMX21_CLK_UART1_IPG_GATE>,
498c2ecf20Sopenharmony_ci                 <&clks IMX21_CLK_PER1>;
508c2ecf20Sopenharmony_ci        clock-names = "ipg", "per";
518c2ecf20Sopenharmony_ci    };
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