18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
28c2ecf20Sopenharmony_ci%YAML 1.2
38c2ecf20Sopenharmony_ci---
48c2ecf20Sopenharmony_ci$id: http://devicetree.org/schemas/clock/idt,versaclock5.yaml#
58c2ecf20Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_cititle: Binding for IDT VersaClock 5 and 6 programmable I2C clock generators
88c2ecf20Sopenharmony_ci
98c2ecf20Sopenharmony_cidescription: |
108c2ecf20Sopenharmony_ci  The IDT VersaClock 5 and VersaClock 6 are programmable I2C
118c2ecf20Sopenharmony_ci  clock generators providing from 3 to 12 output clocks.
128c2ecf20Sopenharmony_ci
138c2ecf20Sopenharmony_ci  When referencing the provided clock in the DT using phandle and clock
148c2ecf20Sopenharmony_ci  specifier, the following mapping applies:
158c2ecf20Sopenharmony_ci
168c2ecf20Sopenharmony_ci  - 5P49V5923:
178c2ecf20Sopenharmony_ci    0 -- OUT0_SEL_I2CB
188c2ecf20Sopenharmony_ci    1 -- OUT1
198c2ecf20Sopenharmony_ci    2 -- OUT2
208c2ecf20Sopenharmony_ci
218c2ecf20Sopenharmony_ci  - 5P49V5933:
228c2ecf20Sopenharmony_ci    0 -- OUT0_SEL_I2CB
238c2ecf20Sopenharmony_ci    1 -- OUT1
248c2ecf20Sopenharmony_ci    2 -- OUT4
258c2ecf20Sopenharmony_ci
268c2ecf20Sopenharmony_ci  - other parts:
278c2ecf20Sopenharmony_ci    0 -- OUT0_SEL_I2CB
288c2ecf20Sopenharmony_ci    1 -- OUT1
298c2ecf20Sopenharmony_ci    2 -- OUT2
308c2ecf20Sopenharmony_ci    3 -- OUT3
318c2ecf20Sopenharmony_ci    4 -- OUT4
328c2ecf20Sopenharmony_ci
338c2ecf20Sopenharmony_cimaintainers:
348c2ecf20Sopenharmony_ci  - Luca Ceresoli <luca@lucaceresoli.net>
358c2ecf20Sopenharmony_ci
368c2ecf20Sopenharmony_ciproperties:
378c2ecf20Sopenharmony_ci  compatible:
388c2ecf20Sopenharmony_ci    enum:
398c2ecf20Sopenharmony_ci      - idt,5p49v5923
408c2ecf20Sopenharmony_ci      - idt,5p49v5925
418c2ecf20Sopenharmony_ci      - idt,5p49v5933
428c2ecf20Sopenharmony_ci      - idt,5p49v5935
438c2ecf20Sopenharmony_ci      - idt,5p49v6901
448c2ecf20Sopenharmony_ci      - idt,5p49v6965
458c2ecf20Sopenharmony_ci
468c2ecf20Sopenharmony_ci  reg:
478c2ecf20Sopenharmony_ci    description: I2C device address
488c2ecf20Sopenharmony_ci    enum: [ 0x68, 0x6a ]
498c2ecf20Sopenharmony_ci
508c2ecf20Sopenharmony_ci  '#clock-cells':
518c2ecf20Sopenharmony_ci    const: 1
528c2ecf20Sopenharmony_ci
538c2ecf20Sopenharmony_ci  clock-names:
548c2ecf20Sopenharmony_ci    minItems: 1
558c2ecf20Sopenharmony_ci    maxItems: 2
568c2ecf20Sopenharmony_ci    items:
578c2ecf20Sopenharmony_ci      enum: [ xin, clkin ]
588c2ecf20Sopenharmony_ci  clocks:
598c2ecf20Sopenharmony_ci    minItems: 1
608c2ecf20Sopenharmony_ci    maxItems: 2
618c2ecf20Sopenharmony_ci
628c2ecf20Sopenharmony_cipatternProperties:
638c2ecf20Sopenharmony_ci  "^OUT[1-4]$":
648c2ecf20Sopenharmony_ci    type: object
658c2ecf20Sopenharmony_ci    description:
668c2ecf20Sopenharmony_ci      Description of one of the outputs (OUT1..OUT4). See "Clock1 Output
678c2ecf20Sopenharmony_ci      Configuration" in the Versaclock 5/6/6E Family Register Description
688c2ecf20Sopenharmony_ci      and Programming Guide.
698c2ecf20Sopenharmony_ci    properties:
708c2ecf20Sopenharmony_ci      idt,mode:
718c2ecf20Sopenharmony_ci        description:
728c2ecf20Sopenharmony_ci          The output drive mode. Values defined in dt-bindings/clk/versaclock.h
738c2ecf20Sopenharmony_ci        $ref: /schemas/types.yaml#/definitions/uint32
748c2ecf20Sopenharmony_ci        minimum: 0
758c2ecf20Sopenharmony_ci        maximum: 6
768c2ecf20Sopenharmony_ci      idt,voltage-microvolt:
778c2ecf20Sopenharmony_ci        description: The output drive voltage.
788c2ecf20Sopenharmony_ci        enum: [ 1800000, 2500000, 3300000 ]
798c2ecf20Sopenharmony_ci      idt,slew-percent:
808c2ecf20Sopenharmony_ci        description: The Slew rate control for CMOS single-ended.
818c2ecf20Sopenharmony_ci        $ref: /schemas/types.yaml#/definitions/uint32
828c2ecf20Sopenharmony_ci        enum: [ 80, 85, 90, 100 ]
838c2ecf20Sopenharmony_ci
848c2ecf20Sopenharmony_cirequired:
858c2ecf20Sopenharmony_ci  - compatible
868c2ecf20Sopenharmony_ci  - reg
878c2ecf20Sopenharmony_ci  - '#clock-cells'
888c2ecf20Sopenharmony_ci
898c2ecf20Sopenharmony_ciallOf:
908c2ecf20Sopenharmony_ci  - if:
918c2ecf20Sopenharmony_ci      properties:
928c2ecf20Sopenharmony_ci        compatible:
938c2ecf20Sopenharmony_ci          enum:
948c2ecf20Sopenharmony_ci            - idt,5p49v5933
958c2ecf20Sopenharmony_ci            - idt,5p49v5935
968c2ecf20Sopenharmony_ci    then:
978c2ecf20Sopenharmony_ci      # Devices with builtin crystal + optional external input
988c2ecf20Sopenharmony_ci      properties:
998c2ecf20Sopenharmony_ci        clock-names:
1008c2ecf20Sopenharmony_ci          const: clkin
1018c2ecf20Sopenharmony_ci        clocks:
1028c2ecf20Sopenharmony_ci          maxItems: 1
1038c2ecf20Sopenharmony_ci    else:
1048c2ecf20Sopenharmony_ci      # Devices without builtin crystal
1058c2ecf20Sopenharmony_ci      required:
1068c2ecf20Sopenharmony_ci        - clock-names
1078c2ecf20Sopenharmony_ci        - clocks
1088c2ecf20Sopenharmony_ci
1098c2ecf20Sopenharmony_ciadditionalProperties: false
1108c2ecf20Sopenharmony_ci
1118c2ecf20Sopenharmony_ciexamples:
1128c2ecf20Sopenharmony_ci  - |
1138c2ecf20Sopenharmony_ci    #include <dt-bindings/clk/versaclock.h>
1148c2ecf20Sopenharmony_ci
1158c2ecf20Sopenharmony_ci    /* 25MHz reference crystal */
1168c2ecf20Sopenharmony_ci    ref25: ref25m {
1178c2ecf20Sopenharmony_ci        compatible = "fixed-clock";
1188c2ecf20Sopenharmony_ci        #clock-cells = <0>;
1198c2ecf20Sopenharmony_ci        clock-frequency = <25000000>;
1208c2ecf20Sopenharmony_ci    };
1218c2ecf20Sopenharmony_ci
1228c2ecf20Sopenharmony_ci    i2c@0 {
1238c2ecf20Sopenharmony_ci        reg = <0x0 0x100>;
1248c2ecf20Sopenharmony_ci        #address-cells = <1>;
1258c2ecf20Sopenharmony_ci        #size-cells = <0>;
1268c2ecf20Sopenharmony_ci
1278c2ecf20Sopenharmony_ci        /* IDT 5P49V5923 I2C clock generator */
1288c2ecf20Sopenharmony_ci        vc5: clock-generator@6a {
1298c2ecf20Sopenharmony_ci            compatible = "idt,5p49v5923";
1308c2ecf20Sopenharmony_ci            reg = <0x6a>;
1318c2ecf20Sopenharmony_ci            #clock-cells = <1>;
1328c2ecf20Sopenharmony_ci
1338c2ecf20Sopenharmony_ci            /* Connect XIN input to 25MHz reference */
1348c2ecf20Sopenharmony_ci            clocks = <&ref25m>;
1358c2ecf20Sopenharmony_ci            clock-names = "xin";
1368c2ecf20Sopenharmony_ci
1378c2ecf20Sopenharmony_ci            OUT1 {
1388c2ecf20Sopenharmony_ci                idt,drive-mode = <VC5_CMOSD>;
1398c2ecf20Sopenharmony_ci                idt,voltage-microvolts = <1800000>;
1408c2ecf20Sopenharmony_ci                idt,slew-percent = <80>;
1418c2ecf20Sopenharmony_ci            };
1428c2ecf20Sopenharmony_ci
1438c2ecf20Sopenharmony_ci            OUT4 {
1448c2ecf20Sopenharmony_ci                idt,drive-mode = <VC5_LVDS>;
1458c2ecf20Sopenharmony_ci            };
1468c2ecf20Sopenharmony_ci        };
1478c2ecf20Sopenharmony_ci    };
1488c2ecf20Sopenharmony_ci
1498c2ecf20Sopenharmony_ci    /* Consumer referencing the 5P49V5923 pin OUT1 */
1508c2ecf20Sopenharmony_ci    consumer {
1518c2ecf20Sopenharmony_ci        /* ... */
1528c2ecf20Sopenharmony_ci        clocks = <&vc5 1>;
1538c2ecf20Sopenharmony_ci        /* ... */
1548c2ecf20Sopenharmony_ci    };
1558c2ecf20Sopenharmony_ci
1568c2ecf20Sopenharmony_ci...
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