18c2ecf20Sopenharmony_ci* Hisilicon Hi3660 Clock Controller
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ciThe Hi3660 clock controller generates and supplies clock to various
48c2ecf20Sopenharmony_cicontrollers within the Hi3660 SoC.
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68c2ecf20Sopenharmony_ciRequired Properties:
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88c2ecf20Sopenharmony_ci- compatible: the compatible should be one of the following strings to
98c2ecf20Sopenharmony_ci	indicate the clock controller functionality.
108c2ecf20Sopenharmony_ci
118c2ecf20Sopenharmony_ci	- "hisilicon,hi3660-crgctrl"
128c2ecf20Sopenharmony_ci	- "hisilicon,hi3660-pctrl"
138c2ecf20Sopenharmony_ci	- "hisilicon,hi3660-pmuctrl"
148c2ecf20Sopenharmony_ci	- "hisilicon,hi3660-sctrl"
158c2ecf20Sopenharmony_ci	- "hisilicon,hi3660-iomcu"
168c2ecf20Sopenharmony_ci	- "hisilicon,hi3660-stub-clk"
178c2ecf20Sopenharmony_ci
188c2ecf20Sopenharmony_ci- reg: physical base address of the controller and length of memory mapped
198c2ecf20Sopenharmony_ci  region.
208c2ecf20Sopenharmony_ci
218c2ecf20Sopenharmony_ci- #clock-cells: should be 1.
228c2ecf20Sopenharmony_ci
238c2ecf20Sopenharmony_ciOptional Properties:
248c2ecf20Sopenharmony_ci
258c2ecf20Sopenharmony_ci- mboxes: Phandle to the mailbox for sending message to MCU.
268c2ecf20Sopenharmony_ci            (See: ../mailbox/hisilicon,hi3660-mailbox.txt for more info)
278c2ecf20Sopenharmony_ci
288c2ecf20Sopenharmony_ciEach clock is assigned an identifier and client nodes use this identifier
298c2ecf20Sopenharmony_cito specify the clock which they consume.
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318c2ecf20Sopenharmony_ciAll these identifier could be found in <dt-bindings/clock/hi3660-clock.h>.
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338c2ecf20Sopenharmony_ciExamples:
348c2ecf20Sopenharmony_ci	crg_ctrl: clock-controller@fff35000 {
358c2ecf20Sopenharmony_ci		compatible = "hisilicon,hi3660-crgctrl", "syscon";
368c2ecf20Sopenharmony_ci		reg = <0x0 0xfff35000 0x0 0x1000>;
378c2ecf20Sopenharmony_ci		#clock-cells = <1>;
388c2ecf20Sopenharmony_ci	};
398c2ecf20Sopenharmony_ci
408c2ecf20Sopenharmony_ci	uart0: serial@fdf02000 {
418c2ecf20Sopenharmony_ci		compatible = "arm,pl011", "arm,primecell";
428c2ecf20Sopenharmony_ci		reg = <0x0 0xfdf02000 0x0 0x1000>;
438c2ecf20Sopenharmony_ci		interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
448c2ecf20Sopenharmony_ci		clocks = <&crg_ctrl HI3660_CLK_MUX_UART0>,
458c2ecf20Sopenharmony_ci			 <&crg_ctrl HI3660_PCLK>;
468c2ecf20Sopenharmony_ci		clock-names = "uartclk", "apb_pclk";
478c2ecf20Sopenharmony_ci	};
48