18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 28c2ecf20Sopenharmony_ci%YAML 1.2 38c2ecf20Sopenharmony_ci--- 48c2ecf20Sopenharmony_ci$id: http://devicetree.org/schemas/clock/fsl,sai-clock.yaml# 58c2ecf20Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_cititle: Freescale SAI bitclock-as-a-clock binding 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_cimaintainers: 108c2ecf20Sopenharmony_ci - Michael Walle <michael@walle.cc> 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_cidescription: | 138c2ecf20Sopenharmony_ci It is possible to use the BCLK pin of a SAI module as a generic clock 148c2ecf20Sopenharmony_ci output. Some SoC are very constrained in their pin multiplexer 158c2ecf20Sopenharmony_ci configuration. Eg. pins can only be changed groups. For example, on the 168c2ecf20Sopenharmony_ci LS1028A SoC you can only enable SAIs in pairs. If you use only one SAI, 178c2ecf20Sopenharmony_ci the second pins are wasted. Using this binding it is possible to use the 188c2ecf20Sopenharmony_ci clock of the second SAI as a MCLK clock for an audio codec, for example. 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ci This is a composite of a gated clock and a divider clock. 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ciproperties: 238c2ecf20Sopenharmony_ci compatible: 248c2ecf20Sopenharmony_ci const: fsl,vf610-sai-clock 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_ci reg: 278c2ecf20Sopenharmony_ci maxItems: 1 288c2ecf20Sopenharmony_ci 298c2ecf20Sopenharmony_ci clocks: 308c2ecf20Sopenharmony_ci maxItems: 1 318c2ecf20Sopenharmony_ci 328c2ecf20Sopenharmony_ci '#clock-cells': 338c2ecf20Sopenharmony_ci const: 0 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_cirequired: 368c2ecf20Sopenharmony_ci - compatible 378c2ecf20Sopenharmony_ci - reg 388c2ecf20Sopenharmony_ci - clocks 398c2ecf20Sopenharmony_ci - '#clock-cells' 408c2ecf20Sopenharmony_ci 418c2ecf20Sopenharmony_ciadditionalProperties: false 428c2ecf20Sopenharmony_ci 438c2ecf20Sopenharmony_ciexamples: 448c2ecf20Sopenharmony_ci - | 458c2ecf20Sopenharmony_ci soc { 468c2ecf20Sopenharmony_ci #address-cells = <2>; 478c2ecf20Sopenharmony_ci #size-cells = <2>; 488c2ecf20Sopenharmony_ci 498c2ecf20Sopenharmony_ci mclk: clock-mclk@f130080 { 508c2ecf20Sopenharmony_ci compatible = "fsl,vf610-sai-clock"; 518c2ecf20Sopenharmony_ci reg = <0x0 0xf130080 0x0 0x80>; 528c2ecf20Sopenharmony_ci #clock-cells = <0>; 538c2ecf20Sopenharmony_ci clocks = <&parentclk>; 548c2ecf20Sopenharmony_ci }; 558c2ecf20Sopenharmony_ci }; 56