18c2ecf20Sopenharmony_ci* Xtal Clock bindings for Marvell Armada 37xx SoCs
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ciMarvell Armada 37xx SoCs allow to determine the xtal clock frequencies by
48c2ecf20Sopenharmony_cireading the gpio latch register.
58c2ecf20Sopenharmony_ci
68c2ecf20Sopenharmony_ciThis node must be a subnode of the node exposing the register address
78c2ecf20Sopenharmony_ciof the GPIO block where the gpio latch is located.
88c2ecf20Sopenharmony_ciSee Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt
98c2ecf20Sopenharmony_ci
108c2ecf20Sopenharmony_ciRequired properties:
118c2ecf20Sopenharmony_ci- compatible : shall be one of the following:
128c2ecf20Sopenharmony_ci	"marvell,armada-3700-xtal-clock"
138c2ecf20Sopenharmony_ci- #clock-cells : from common clock binding; shall be set to 0
148c2ecf20Sopenharmony_ci
158c2ecf20Sopenharmony_ciOptional properties:
168c2ecf20Sopenharmony_ci- clock-output-names : from common clock binding; allows overwrite default clock
178c2ecf20Sopenharmony_ci	output names ("xtal")
188c2ecf20Sopenharmony_ci
198c2ecf20Sopenharmony_ciExample:
208c2ecf20Sopenharmony_cipinctrl_nb: pinctrl-nb@13800 {
218c2ecf20Sopenharmony_ci	compatible = "armada3710-nb-pinctrl", "syscon", "simple-mfd";
228c2ecf20Sopenharmony_ci	reg = <0x13800 0x100>, <0x13C00 0x20>;
238c2ecf20Sopenharmony_ci
248c2ecf20Sopenharmony_ci	xtalclk: xtal-clk {
258c2ecf20Sopenharmony_ci		compatible = "marvell,armada-3700-xtal-clock";
268c2ecf20Sopenharmony_ci		clock-output-names = "xtal";
278c2ecf20Sopenharmony_ci		#clock-cells = <0>;
288c2ecf20Sopenharmony_ci	};
298c2ecf20Sopenharmony_ci};
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