18c2ecf20Sopenharmony_ci* Time Base Generator Clock bindings for Marvell Armada 37xx SoCs 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciMarvell Armada 37xx SoCs provde Time Base Generator clocks which are 48c2ecf20Sopenharmony_ciused as parent clocks for the peripheral clocks. 58c2ecf20Sopenharmony_ci 68c2ecf20Sopenharmony_ciThe TBG clock consumer should specify the desired clock by having the 78c2ecf20Sopenharmony_ciclock ID in its "clocks" phandle cell. 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_ciThe following is a list of provided IDs and clock names on Armada 3700: 108c2ecf20Sopenharmony_ci 0 = TBG A P 118c2ecf20Sopenharmony_ci 1 = TBG B P 128c2ecf20Sopenharmony_ci 2 = TBG A S 138c2ecf20Sopenharmony_ci 3 = TBG B S 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_ciRequired properties: 168c2ecf20Sopenharmony_ci- compatible : shall be "marvell,armada-3700-tbg-clock" 178c2ecf20Sopenharmony_ci- reg : must be the register address of North Bridge PLL register 188c2ecf20Sopenharmony_ci- #clock-cells : from common clock binding; shall be set to 1 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ciExample: 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_citbg: tbg@13200 { 238c2ecf20Sopenharmony_ci compatible = "marvell,armada-3700-tbg-clock"; 248c2ecf20Sopenharmony_ci reg = <0x13200 0x1000>; 258c2ecf20Sopenharmony_ci clocks = <&xtalclk>; 268c2ecf20Sopenharmony_ci #clock-cells = <1>; 278c2ecf20Sopenharmony_ci}; 28