18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
28c2ecf20Sopenharmony_ci%YAML 1.2
38c2ecf20Sopenharmony_ci---
48c2ecf20Sopenharmony_ci$id: http://devicetree.org/schemas/clock/arm,syscon-icst.yaml#
58c2ecf20Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_cititle: ARM System Controller ICST Clocks
88c2ecf20Sopenharmony_ci
98c2ecf20Sopenharmony_cimaintainers:
108c2ecf20Sopenharmony_ci  - Linus Walleij <linusw@kernel.org>
118c2ecf20Sopenharmony_ci
128c2ecf20Sopenharmony_cidescription: |
138c2ecf20Sopenharmony_ci  The ICS525 and ICS307 oscillators are produced by Integrated
148c2ecf20Sopenharmony_ci  Devices Technology (IDT). ARM integrated these oscillators deeply into their
158c2ecf20Sopenharmony_ci  reference designs by adding special control registers that manage such
168c2ecf20Sopenharmony_ci  oscillators to their system controllers.
178c2ecf20Sopenharmony_ci
188c2ecf20Sopenharmony_ci  The various ARM system controllers contain logic to serialize and initialize
198c2ecf20Sopenharmony_ci  an ICST clock request after a write to the 32 bit register at an offset
208c2ecf20Sopenharmony_ci  into the system controller. Furthermore, to even be able to alter one of
218c2ecf20Sopenharmony_ci  these frequencies, the system controller must first be unlocked by
228c2ecf20Sopenharmony_ci  writing a special token to another offset in the system controller.
238c2ecf20Sopenharmony_ci
248c2ecf20Sopenharmony_ci  Some ARM hardware contain special versions of the serial interface that only
258c2ecf20Sopenharmony_ci  connects the low 8 bits of the VDW (missing one bit), hard-wires RDW to
268c2ecf20Sopenharmony_ci  different values and sometimes also hard-wires the output divider. They
278c2ecf20Sopenharmony_ci  therefore have special compatible strings as per this table (the OD value is
288c2ecf20Sopenharmony_ci  the value on the pins, not the resulting output divider).
298c2ecf20Sopenharmony_ci
308c2ecf20Sopenharmony_ci  In the core modules and logic tiles, the ICST is a configurable clock fed
318c2ecf20Sopenharmony_ci  from a 24 MHz clock on the motherboard (usually the main crystal) used for
328c2ecf20Sopenharmony_ci  generating e.g. video clocks. It is located on the core module and there is
338c2ecf20Sopenharmony_ci  only one of these. This clock node must be a subnode of the core module.
348c2ecf20Sopenharmony_ci
358c2ecf20Sopenharmony_ci  Hardware variant         RDW     OD          VDW
368c2ecf20Sopenharmony_ci
378c2ecf20Sopenharmony_ci  Integrator/AP            22      1           Bit 8 0, rest variable
388c2ecf20Sopenharmony_ci  integratorap-cm
398c2ecf20Sopenharmony_ci
408c2ecf20Sopenharmony_ci  Integrator/AP            46      3           Bit 8 0, rest variable
418c2ecf20Sopenharmony_ci  integratorap-sys
428c2ecf20Sopenharmony_ci
438c2ecf20Sopenharmony_ci  Integrator/AP            22 or   1           17 or (33 or 25 MHz)
448c2ecf20Sopenharmony_ci  integratorap-pci         14      1           14
458c2ecf20Sopenharmony_ci
468c2ecf20Sopenharmony_ci  Integrator/CP            22      variable    Bit 8 0, rest variable
478c2ecf20Sopenharmony_ci  integratorcp-cm-core
488c2ecf20Sopenharmony_ci
498c2ecf20Sopenharmony_ci  Integrator/CP            22      variable    Bit 8 0, rest variable
508c2ecf20Sopenharmony_ci  integratorcp-cm-mem
518c2ecf20Sopenharmony_ci
528c2ecf20Sopenharmony_ci  The ICST oscillator must be provided inside a system controller node.
538c2ecf20Sopenharmony_ci
548c2ecf20Sopenharmony_ciproperties:
558c2ecf20Sopenharmony_ci  "#clock-cells":
568c2ecf20Sopenharmony_ci    const: 0
578c2ecf20Sopenharmony_ci
588c2ecf20Sopenharmony_ci  compatible:
598c2ecf20Sopenharmony_ci    enum:
608c2ecf20Sopenharmony_ci      - arm,syscon-icst525
618c2ecf20Sopenharmony_ci      - arm,syscon-icst307
628c2ecf20Sopenharmony_ci      - arm,syscon-icst525-integratorap-cm
638c2ecf20Sopenharmony_ci      - arm,syscon-icst525-integratorap-sys
648c2ecf20Sopenharmony_ci      - arm,syscon-icst525-integratorap-pci
658c2ecf20Sopenharmony_ci      - arm,syscon-icst525-integratorcp-cm-core
668c2ecf20Sopenharmony_ci      - arm,syscon-icst525-integratorcp-cm-mem
678c2ecf20Sopenharmony_ci      - arm,integrator-cm-auxosc
688c2ecf20Sopenharmony_ci      - arm,versatile-cm-auxosc
698c2ecf20Sopenharmony_ci      - arm,impd-vco1
708c2ecf20Sopenharmony_ci      - arm,impd-vco2
718c2ecf20Sopenharmony_ci
728c2ecf20Sopenharmony_ci  clocks:
738c2ecf20Sopenharmony_ci    description: Parent clock for the ICST VCO
748c2ecf20Sopenharmony_ci    maxItems: 1
758c2ecf20Sopenharmony_ci
768c2ecf20Sopenharmony_ci  clock-output-names:
778c2ecf20Sopenharmony_ci    maxItems: 1
788c2ecf20Sopenharmony_ci
798c2ecf20Sopenharmony_ci  lock-offset:
808c2ecf20Sopenharmony_ci    $ref: '/schemas/types.yaml#/definitions/uint32'
818c2ecf20Sopenharmony_ci    description: Offset to the unlocking register for the oscillator
828c2ecf20Sopenharmony_ci
838c2ecf20Sopenharmony_ci  vco-offset:
848c2ecf20Sopenharmony_ci    $ref: '/schemas/types.yaml#/definitions/uint32'
858c2ecf20Sopenharmony_ci    description: Offset to the VCO register for the oscillator
868c2ecf20Sopenharmony_ci
878c2ecf20Sopenharmony_cirequired:
888c2ecf20Sopenharmony_ci  - "#clock-cells"
898c2ecf20Sopenharmony_ci  - compatible
908c2ecf20Sopenharmony_ci  - clocks
918c2ecf20Sopenharmony_ci
928c2ecf20Sopenharmony_ciadditionalProperties: false
938c2ecf20Sopenharmony_ci
948c2ecf20Sopenharmony_ciexamples:
958c2ecf20Sopenharmony_ci  - |
968c2ecf20Sopenharmony_ci    vco1: clock {
978c2ecf20Sopenharmony_ci      compatible = "arm,impd1-vco1";
988c2ecf20Sopenharmony_ci      #clock-cells = <0>;
998c2ecf20Sopenharmony_ci      lock-offset = <0x08>;
1008c2ecf20Sopenharmony_ci      vco-offset = <0x00>;
1018c2ecf20Sopenharmony_ci      clocks = <&sysclk>;
1028c2ecf20Sopenharmony_ci      clock-output-names = "IM-PD1-VCO1";
1038c2ecf20Sopenharmony_ci    };
1048c2ecf20Sopenharmony_ci
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