18c2ecf20Sopenharmony_ci* Amlogic Meson8, Meson8b and Meson8m2 Clock and Reset Unit
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38c2ecf20Sopenharmony_ciThe Amlogic Meson8 / Meson8b / Meson8m2 clock controller generates and
48c2ecf20Sopenharmony_cisupplies clock to various controllers within the SoC.
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68c2ecf20Sopenharmony_ciRequired Properties:
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88c2ecf20Sopenharmony_ci- compatible: must be one of:
98c2ecf20Sopenharmony_ci	- "amlogic,meson8-clkc" for Meson8 (S802) SoCs
108c2ecf20Sopenharmony_ci	- "amlogic,meson8b-clkc" for Meson8 (S805) SoCs
118c2ecf20Sopenharmony_ci	- "amlogic,meson8m2-clkc" for Meson8m2 (S812) SoCs
128c2ecf20Sopenharmony_ci- #clock-cells: should be 1.
138c2ecf20Sopenharmony_ci- #reset-cells: should be 1.
148c2ecf20Sopenharmony_ci- clocks: list of clock phandles, one for each entry in clock-names
158c2ecf20Sopenharmony_ci- clock-names: should contain the following:
168c2ecf20Sopenharmony_ci  * "xtal": the 24MHz system oscillator
178c2ecf20Sopenharmony_ci  * "ddr_pll": the DDR PLL clock
188c2ecf20Sopenharmony_ci  * "clk_32k": (if present) the 32kHz clock signal from GPIOAO_6 (CLK_32K_IN)
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208c2ecf20Sopenharmony_ciParent node should have the following properties :
218c2ecf20Sopenharmony_ci- compatible: "amlogic,meson-hhi-sysctrl", "simple-mfd", "syscon"
228c2ecf20Sopenharmony_ci- reg: base address and size of the HHI system control register space.
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248c2ecf20Sopenharmony_ciEach clock is assigned an identifier and client nodes can use this identifier
258c2ecf20Sopenharmony_cito specify the clock which they consume. All available clocks are defined as
268c2ecf20Sopenharmony_cipreprocessor macros in the dt-bindings/clock/meson8b-clkc.h header and can be
278c2ecf20Sopenharmony_ciused in device tree sources.
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298c2ecf20Sopenharmony_ciSimilarly a preprocessor macro for each reset line is defined in
308c2ecf20Sopenharmony_cidt-bindings/reset/amlogic,meson8b-clkc-reset.h (which can be used from the
318c2ecf20Sopenharmony_cidevice tree sources).
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348c2ecf20Sopenharmony_ciExample: Clock controller node:
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368c2ecf20Sopenharmony_ci	clkc: clock-controller {
378c2ecf20Sopenharmony_ci		compatible = "amlogic,meson8b-clkc";
388c2ecf20Sopenharmony_ci		#clock-cells = <1>;
398c2ecf20Sopenharmony_ci		#reset-cells = <1>;
408c2ecf20Sopenharmony_ci	};
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438c2ecf20Sopenharmony_ciExample: UART controller node that consumes the clock generated by the clock
448c2ecf20Sopenharmony_ci  controller:
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468c2ecf20Sopenharmony_ci	uart_AO: serial@c81004c0 {
478c2ecf20Sopenharmony_ci		compatible = "amlogic,meson-uart";
488c2ecf20Sopenharmony_ci		reg = <0xc81004c0 0x14>;
498c2ecf20Sopenharmony_ci		interrupts = <0 90 1>;
508c2ecf20Sopenharmony_ci		clocks = <&clkc CLKID_CLK81>;
518c2ecf20Sopenharmony_ci	};
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