18c2ecf20Sopenharmony_ci* Amlogic GXBB Clock and Reset Unit 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciThe Amlogic GXBB clock controller generates and supplies clock to various 48c2ecf20Sopenharmony_cicontrollers within the SoC. 58c2ecf20Sopenharmony_ci 68c2ecf20Sopenharmony_ciRequired Properties: 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ci- compatible: should be: 98c2ecf20Sopenharmony_ci "amlogic,gxbb-clkc" for GXBB SoC, 108c2ecf20Sopenharmony_ci "amlogic,gxl-clkc" for GXL and GXM SoC, 118c2ecf20Sopenharmony_ci "amlogic,axg-clkc" for AXG SoC. 128c2ecf20Sopenharmony_ci "amlogic,g12a-clkc" for G12A SoC. 138c2ecf20Sopenharmony_ci "amlogic,g12b-clkc" for G12B SoC. 148c2ecf20Sopenharmony_ci "amlogic,sm1-clkc" for SM1 SoC. 158c2ecf20Sopenharmony_ci- clocks : list of clock phandle, one for each entry clock-names. 168c2ecf20Sopenharmony_ci- clock-names : should contain the following: 178c2ecf20Sopenharmony_ci * "xtal": the platform xtal 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ci- #clock-cells: should be 1. 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ciEach clock is assigned an identifier and client nodes can use this identifier 228c2ecf20Sopenharmony_cito specify the clock which they consume. All available clocks are defined as 238c2ecf20Sopenharmony_cipreprocessor macros in the dt-bindings/clock/gxbb-clkc.h header and can be 248c2ecf20Sopenharmony_ciused in device tree sources. 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_ciParent node should have the following properties : 278c2ecf20Sopenharmony_ci- compatible: "syscon", "simple-mfd, and "amlogic,meson-gx-hhi-sysctrl" or 288c2ecf20Sopenharmony_ci "amlogic,meson-axg-hhi-sysctrl" 298c2ecf20Sopenharmony_ci- reg: base address and size of the HHI system control register space. 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ciExample: Clock controller node: 328c2ecf20Sopenharmony_ci 338c2ecf20Sopenharmony_cisysctrl: system-controller@0 { 348c2ecf20Sopenharmony_ci compatible = "amlogic,meson-gx-hhi-sysctrl", "syscon", "simple-mfd"; 358c2ecf20Sopenharmony_ci reg = <0 0 0 0x400>; 368c2ecf20Sopenharmony_ci 378c2ecf20Sopenharmony_ci clkc: clock-controller { 388c2ecf20Sopenharmony_ci #clock-cells = <1>; 398c2ecf20Sopenharmony_ci compatible = "amlogic,gxbb-clkc"; 408c2ecf20Sopenharmony_ci clocks = <&xtal>; 418c2ecf20Sopenharmony_ci clock-names = "xtal"; 428c2ecf20Sopenharmony_ci }; 438c2ecf20Sopenharmony_ci}; 448c2ecf20Sopenharmony_ci 458c2ecf20Sopenharmony_ciExample: UART controller node that consumes the clock generated by the clock 468c2ecf20Sopenharmony_ci controller: 478c2ecf20Sopenharmony_ci 488c2ecf20Sopenharmony_ci uart_AO: serial@c81004c0 { 498c2ecf20Sopenharmony_ci compatible = "amlogic,meson-uart"; 508c2ecf20Sopenharmony_ci reg = <0xc81004c0 0x14>; 518c2ecf20Sopenharmony_ci interrupts = <0 90 1>; 528c2ecf20Sopenharmony_ci clocks = <&clkc CLKID_CLK81>; 538c2ecf20Sopenharmony_ci }; 54