18c2ecf20Sopenharmony_ciAlphascale Clock Controller 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciThe ACC (Alphascale Clock Controller) is responsible of choising proper 48c2ecf20Sopenharmony_ciclock source, setting deviders and clock gates. 58c2ecf20Sopenharmony_ci 68c2ecf20Sopenharmony_ciRequired properties for the ACC node: 78c2ecf20Sopenharmony_ci - compatible: must be "alphascale,asm9260-clock-controller" 88c2ecf20Sopenharmony_ci - reg: must contain the ACC register base and size 98c2ecf20Sopenharmony_ci - #clock-cells : shall be set to 1. 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ciSimple one-cell clock specifier format is used, where the only cell is used 128c2ecf20Sopenharmony_cias an index of the clock inside the provider. 138c2ecf20Sopenharmony_ciIt is encouraged to use dt-binding for clock index definitions. SoC specific 148c2ecf20Sopenharmony_cidt-binding should be included to the device tree descriptor. For example 158c2ecf20Sopenharmony_ciAlphascale ASM9260: 168c2ecf20Sopenharmony_ci#include <dt-bindings/clock/alphascale,asm9260.h> 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_ciThis binding contains two types of clock providers: 198c2ecf20Sopenharmony_ci _AHB_ - AHB gate; 208c2ecf20Sopenharmony_ci _SYS_ - adjustable clock source. Not all peripheral have _SYS_ clock provider. 218c2ecf20Sopenharmony_ciAll clock specific details can be found in the SoC documentation. 228c2ecf20Sopenharmony_ciCLKID_AHB_ROM 0 238c2ecf20Sopenharmony_ciCLKID_AHB_RAM 1 248c2ecf20Sopenharmony_ciCLKID_AHB_GPIO 2 258c2ecf20Sopenharmony_ciCLKID_AHB_MAC 3 268c2ecf20Sopenharmony_ciCLKID_AHB_EMI 4 278c2ecf20Sopenharmony_ciCLKID_AHB_USB0 5 288c2ecf20Sopenharmony_ciCLKID_AHB_USB1 6 298c2ecf20Sopenharmony_ciCLKID_AHB_DMA0 7 308c2ecf20Sopenharmony_ciCLKID_AHB_DMA1 8 318c2ecf20Sopenharmony_ciCLKID_AHB_UART0 9 328c2ecf20Sopenharmony_ciCLKID_AHB_UART1 10 338c2ecf20Sopenharmony_ciCLKID_AHB_UART2 11 348c2ecf20Sopenharmony_ciCLKID_AHB_UART3 12 358c2ecf20Sopenharmony_ciCLKID_AHB_UART4 13 368c2ecf20Sopenharmony_ciCLKID_AHB_UART5 14 378c2ecf20Sopenharmony_ciCLKID_AHB_UART6 15 388c2ecf20Sopenharmony_ciCLKID_AHB_UART7 16 398c2ecf20Sopenharmony_ciCLKID_AHB_UART8 17 408c2ecf20Sopenharmony_ciCLKID_AHB_UART9 18 418c2ecf20Sopenharmony_ciCLKID_AHB_I2S0 19 428c2ecf20Sopenharmony_ciCLKID_AHB_I2C0 20 438c2ecf20Sopenharmony_ciCLKID_AHB_I2C1 21 448c2ecf20Sopenharmony_ciCLKID_AHB_SSP0 22 458c2ecf20Sopenharmony_ciCLKID_AHB_IOCONFIG 23 468c2ecf20Sopenharmony_ciCLKID_AHB_WDT 24 478c2ecf20Sopenharmony_ciCLKID_AHB_CAN0 25 488c2ecf20Sopenharmony_ciCLKID_AHB_CAN1 26 498c2ecf20Sopenharmony_ciCLKID_AHB_MPWM 27 508c2ecf20Sopenharmony_ciCLKID_AHB_SPI0 28 518c2ecf20Sopenharmony_ciCLKID_AHB_SPI1 29 528c2ecf20Sopenharmony_ciCLKID_AHB_QEI 30 538c2ecf20Sopenharmony_ciCLKID_AHB_QUADSPI0 31 548c2ecf20Sopenharmony_ciCLKID_AHB_CAMIF 32 558c2ecf20Sopenharmony_ciCLKID_AHB_LCDIF 33 568c2ecf20Sopenharmony_ciCLKID_AHB_TIMER0 34 578c2ecf20Sopenharmony_ciCLKID_AHB_TIMER1 35 588c2ecf20Sopenharmony_ciCLKID_AHB_TIMER2 36 598c2ecf20Sopenharmony_ciCLKID_AHB_TIMER3 37 608c2ecf20Sopenharmony_ciCLKID_AHB_IRQ 38 618c2ecf20Sopenharmony_ciCLKID_AHB_RTC 39 628c2ecf20Sopenharmony_ciCLKID_AHB_NAND 40 638c2ecf20Sopenharmony_ciCLKID_AHB_ADC0 41 648c2ecf20Sopenharmony_ciCLKID_AHB_LED 42 658c2ecf20Sopenharmony_ciCLKID_AHB_DAC0 43 668c2ecf20Sopenharmony_ciCLKID_AHB_LCD 44 678c2ecf20Sopenharmony_ciCLKID_AHB_I2S1 45 688c2ecf20Sopenharmony_ciCLKID_AHB_MAC1 46 698c2ecf20Sopenharmony_ci 708c2ecf20Sopenharmony_ciCLKID_SYS_CPU 47 718c2ecf20Sopenharmony_ciCLKID_SYS_AHB 48 728c2ecf20Sopenharmony_ciCLKID_SYS_I2S0M 49 738c2ecf20Sopenharmony_ciCLKID_SYS_I2S0S 50 748c2ecf20Sopenharmony_ciCLKID_SYS_I2S1M 51 758c2ecf20Sopenharmony_ciCLKID_SYS_I2S1S 52 768c2ecf20Sopenharmony_ciCLKID_SYS_UART0 53 778c2ecf20Sopenharmony_ciCLKID_SYS_UART1 54 788c2ecf20Sopenharmony_ciCLKID_SYS_UART2 55 798c2ecf20Sopenharmony_ciCLKID_SYS_UART3 56 808c2ecf20Sopenharmony_ciCLKID_SYS_UART4 56 818c2ecf20Sopenharmony_ciCLKID_SYS_UART5 57 828c2ecf20Sopenharmony_ciCLKID_SYS_UART6 58 838c2ecf20Sopenharmony_ciCLKID_SYS_UART7 59 848c2ecf20Sopenharmony_ciCLKID_SYS_UART8 60 858c2ecf20Sopenharmony_ciCLKID_SYS_UART9 61 868c2ecf20Sopenharmony_ciCLKID_SYS_SPI0 62 878c2ecf20Sopenharmony_ciCLKID_SYS_SPI1 63 888c2ecf20Sopenharmony_ciCLKID_SYS_QUADSPI 64 898c2ecf20Sopenharmony_ciCLKID_SYS_SSP0 65 908c2ecf20Sopenharmony_ciCLKID_SYS_NAND 66 918c2ecf20Sopenharmony_ciCLKID_SYS_TRACE 67 928c2ecf20Sopenharmony_ciCLKID_SYS_CAMM 68 938c2ecf20Sopenharmony_ciCLKID_SYS_WDT 69 948c2ecf20Sopenharmony_ciCLKID_SYS_CLKOUT 70 958c2ecf20Sopenharmony_ciCLKID_SYS_MAC 71 968c2ecf20Sopenharmony_ciCLKID_SYS_LCD 72 978c2ecf20Sopenharmony_ciCLKID_SYS_ADCANA 73 988c2ecf20Sopenharmony_ci 998c2ecf20Sopenharmony_ciExample of clock consumer with _SYS_ and _AHB_ sinks. 1008c2ecf20Sopenharmony_ciuart4: serial@80010000 { 1018c2ecf20Sopenharmony_ci compatible = "alphascale,asm9260-uart"; 1028c2ecf20Sopenharmony_ci reg = <0x80010000 0x4000>; 1038c2ecf20Sopenharmony_ci clocks = <&acc CLKID_SYS_UART4>, <&acc CLKID_AHB_UART4>; 1048c2ecf20Sopenharmony_ci interrupts = <19>; 1058c2ecf20Sopenharmony_ci}; 1068c2ecf20Sopenharmony_ci 1078c2ecf20Sopenharmony_ciClock consumer with only one, _AHB_ sink. 1088c2ecf20Sopenharmony_citimer0: timer@80088000 { 1098c2ecf20Sopenharmony_ci compatible = "alphascale,asm9260-timer"; 1108c2ecf20Sopenharmony_ci reg = <0x80088000 0x4000>; 1118c2ecf20Sopenharmony_ci clocks = <&acc CLKID_AHB_TIMER0>; 1128c2ecf20Sopenharmony_ci interrupts = <29>; 1138c2ecf20Sopenharmony_ci}; 1148c2ecf20Sopenharmony_ci 115