18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0
28c2ecf20Sopenharmony_ci%YAML 1.2
38c2ecf20Sopenharmony_ci---
48c2ecf20Sopenharmony_ci$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-pll5-clk.yaml#
58c2ecf20Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_cititle: Allwinner A10 DRAM PLL Device Tree Bindings
88c2ecf20Sopenharmony_ci
98c2ecf20Sopenharmony_cimaintainers:
108c2ecf20Sopenharmony_ci  - Chen-Yu Tsai <wens@csie.org>
118c2ecf20Sopenharmony_ci  - Maxime Ripard <mripard@kernel.org>
128c2ecf20Sopenharmony_ci
138c2ecf20Sopenharmony_cideprecated: true
148c2ecf20Sopenharmony_ci
158c2ecf20Sopenharmony_ciproperties:
168c2ecf20Sopenharmony_ci  "#clock-cells":
178c2ecf20Sopenharmony_ci    const: 1
188c2ecf20Sopenharmony_ci    description: >
198c2ecf20Sopenharmony_ci      The first output is the DRAM clock output, the second is meant
208c2ecf20Sopenharmony_ci      for peripherals on the SoC.
218c2ecf20Sopenharmony_ci
228c2ecf20Sopenharmony_ci  compatible:
238c2ecf20Sopenharmony_ci    const: allwinner,sun4i-a10-pll5-clk
248c2ecf20Sopenharmony_ci
258c2ecf20Sopenharmony_ci  reg:
268c2ecf20Sopenharmony_ci    maxItems: 1
278c2ecf20Sopenharmony_ci
288c2ecf20Sopenharmony_ci  clocks:
298c2ecf20Sopenharmony_ci    maxItems: 1
308c2ecf20Sopenharmony_ci
318c2ecf20Sopenharmony_ci  clock-output-names:
328c2ecf20Sopenharmony_ci    maxItems: 2
338c2ecf20Sopenharmony_ci
348c2ecf20Sopenharmony_cirequired:
358c2ecf20Sopenharmony_ci  - "#clock-cells"
368c2ecf20Sopenharmony_ci  - compatible
378c2ecf20Sopenharmony_ci  - reg
388c2ecf20Sopenharmony_ci  - clocks
398c2ecf20Sopenharmony_ci  - clock-output-names
408c2ecf20Sopenharmony_ci
418c2ecf20Sopenharmony_ciadditionalProperties: false
428c2ecf20Sopenharmony_ci
438c2ecf20Sopenharmony_ciexamples:
448c2ecf20Sopenharmony_ci  - |
458c2ecf20Sopenharmony_ci    clk@1c20020 {
468c2ecf20Sopenharmony_ci        #clock-cells = <1>;
478c2ecf20Sopenharmony_ci        compatible = "allwinner,sun4i-a10-pll5-clk";
488c2ecf20Sopenharmony_ci        reg = <0x01c20020 0x4>;
498c2ecf20Sopenharmony_ci        clocks = <&osc24M>;
508c2ecf20Sopenharmony_ci        clock-output-names = "pll5_ddr", "pll5_other";
518c2ecf20Sopenharmony_ci    };
528c2ecf20Sopenharmony_ci
538c2ecf20Sopenharmony_ci...
54