18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0
28c2ecf20Sopenharmony_ci%YAML 1.2
38c2ecf20Sopenharmony_ci---
48c2ecf20Sopenharmony_ci$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-mod0-clk.yaml#
58c2ecf20Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_cititle: Allwinner A10 Module 0 Clock Device Tree Bindings
88c2ecf20Sopenharmony_ci
98c2ecf20Sopenharmony_cimaintainers:
108c2ecf20Sopenharmony_ci  - Chen-Yu Tsai <wens@csie.org>
118c2ecf20Sopenharmony_ci  - Maxime Ripard <mripard@kernel.org>
128c2ecf20Sopenharmony_ci
138c2ecf20Sopenharmony_cideprecated: true
148c2ecf20Sopenharmony_ci
158c2ecf20Sopenharmony_ciselect:
168c2ecf20Sopenharmony_ci  properties:
178c2ecf20Sopenharmony_ci    compatible:
188c2ecf20Sopenharmony_ci      contains:
198c2ecf20Sopenharmony_ci        enum:
208c2ecf20Sopenharmony_ci          - allwinner,sun4i-a10-mod0-clk
218c2ecf20Sopenharmony_ci          - allwinner,sun9i-a80-mod0-clk
228c2ecf20Sopenharmony_ci
238c2ecf20Sopenharmony_ci  # The PRCM on the A31 and A23 will have the reg property missing,
248c2ecf20Sopenharmony_ci  # since it's set at the upper level node, and will be validated by
258c2ecf20Sopenharmony_ci  # PRCM's schema. Make sure we only validate standalone nodes.
268c2ecf20Sopenharmony_ci  required:
278c2ecf20Sopenharmony_ci    - compatible
288c2ecf20Sopenharmony_ci    - reg
298c2ecf20Sopenharmony_ci
308c2ecf20Sopenharmony_ciproperties:
318c2ecf20Sopenharmony_ci  "#clock-cells":
328c2ecf20Sopenharmony_ci    const: 0
338c2ecf20Sopenharmony_ci
348c2ecf20Sopenharmony_ci  compatible:
358c2ecf20Sopenharmony_ci    enum:
368c2ecf20Sopenharmony_ci      - allwinner,sun4i-a10-mod0-clk
378c2ecf20Sopenharmony_ci      - allwinner,sun9i-a80-mod0-clk
388c2ecf20Sopenharmony_ci
398c2ecf20Sopenharmony_ci  reg:
408c2ecf20Sopenharmony_ci    maxItems: 1
418c2ecf20Sopenharmony_ci
428c2ecf20Sopenharmony_ci  clocks:
438c2ecf20Sopenharmony_ci    # On the A80, the PRCM mod0 clocks have 2 parents.
448c2ecf20Sopenharmony_ci    minItems: 2
458c2ecf20Sopenharmony_ci    maxItems: 3
468c2ecf20Sopenharmony_ci    description: >
478c2ecf20Sopenharmony_ci      The parent order must match the hardware programming order.
488c2ecf20Sopenharmony_ci
498c2ecf20Sopenharmony_ci  clock-output-names:
508c2ecf20Sopenharmony_ci    maxItems: 1
518c2ecf20Sopenharmony_ci
528c2ecf20Sopenharmony_cirequired:
538c2ecf20Sopenharmony_ci  - "#clock-cells"
548c2ecf20Sopenharmony_ci  - compatible
558c2ecf20Sopenharmony_ci  - reg
568c2ecf20Sopenharmony_ci  - clocks
578c2ecf20Sopenharmony_ci  - clock-output-names
588c2ecf20Sopenharmony_ci
598c2ecf20Sopenharmony_ciadditionalProperties: false
608c2ecf20Sopenharmony_ci
618c2ecf20Sopenharmony_ciexamples:
628c2ecf20Sopenharmony_ci  - |
638c2ecf20Sopenharmony_ci    clk@1c20080 {
648c2ecf20Sopenharmony_ci        #clock-cells = <0>;
658c2ecf20Sopenharmony_ci        compatible = "allwinner,sun4i-a10-mod0-clk";
668c2ecf20Sopenharmony_ci        reg = <0x01c20080 0x4>;
678c2ecf20Sopenharmony_ci        clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
688c2ecf20Sopenharmony_ci        clock-output-names = "nand";
698c2ecf20Sopenharmony_ci    };
708c2ecf20Sopenharmony_ci
718c2ecf20Sopenharmony_ci  - |
728c2ecf20Sopenharmony_ci    clk@8001454 {
738c2ecf20Sopenharmony_ci        #clock-cells = <0>;
748c2ecf20Sopenharmony_ci        compatible = "allwinner,sun4i-a10-mod0-clk";
758c2ecf20Sopenharmony_ci        reg = <0x08001454 0x4>;
768c2ecf20Sopenharmony_ci        clocks = <&osc32k>, <&osc24M>;
778c2ecf20Sopenharmony_ci        clock-output-names = "r_ir";
788c2ecf20Sopenharmony_ci    };
798c2ecf20Sopenharmony_ci
808c2ecf20Sopenharmony_ci...
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