18c2ecf20Sopenharmony_ciExternal Memory Interface
28c2ecf20Sopenharmony_ci-------------------------
38c2ecf20Sopenharmony_ci
48c2ecf20Sopenharmony_ciThe emifa node describes a simple external bus controller found on some C6X
58c2ecf20Sopenharmony_ciSoCs. This interface provides external busses with a number of chip selects.
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_ciRequired properties:
88c2ecf20Sopenharmony_ci
98c2ecf20Sopenharmony_ci- compatible: must be "ti,c64x+emifa", "simple-bus"
108c2ecf20Sopenharmony_ci- reg: register area base and size
118c2ecf20Sopenharmony_ci- #address-cells: must be 2 (chip-select + offset)
128c2ecf20Sopenharmony_ci- #size-cells: must be 1
138c2ecf20Sopenharmony_ci- ranges: mapping from EMIFA space to parent space
148c2ecf20Sopenharmony_ci
158c2ecf20Sopenharmony_ci
168c2ecf20Sopenharmony_ciOptional properties:
178c2ecf20Sopenharmony_ci
188c2ecf20Sopenharmony_ci- ti,dscr-dev-enable: Device ID if EMIF is enabled/disabled from DSCR
198c2ecf20Sopenharmony_ci
208c2ecf20Sopenharmony_ci- ti,emifa-burst-priority:
218c2ecf20Sopenharmony_ci      Number of memory transfers after which the EMIF will elevate the priority
228c2ecf20Sopenharmony_ci      of the oldest command in the command FIFO. Setting this field to 255
238c2ecf20Sopenharmony_ci      disables this feature, thereby allowing old commands to stay in the FIFO
248c2ecf20Sopenharmony_ci      indefinitely.
258c2ecf20Sopenharmony_ci
268c2ecf20Sopenharmony_ci- ti,emifa-ce-config:
278c2ecf20Sopenharmony_ci      Configuration values for each of the supported chip selects.
288c2ecf20Sopenharmony_ci
298c2ecf20Sopenharmony_ciExample:
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318c2ecf20Sopenharmony_ci	emifa@70000000 {
328c2ecf20Sopenharmony_ci		compatible = "ti,c64x+emifa", "simple-bus";
338c2ecf20Sopenharmony_ci		#address-cells = <2>;
348c2ecf20Sopenharmony_ci		#size-cells = <1>;
358c2ecf20Sopenharmony_ci		reg = <0x70000000 0x100>;
368c2ecf20Sopenharmony_ci		ranges = <0x2 0x0 0xa0000000 0x00000008
378c2ecf20Sopenharmony_ci		          0x3 0x0 0xb0000000 0x00400000
388c2ecf20Sopenharmony_ci			  0x4 0x0 0xc0000000 0x10000000
398c2ecf20Sopenharmony_ci			  0x5 0x0 0xD0000000 0x10000000>;
408c2ecf20Sopenharmony_ci
418c2ecf20Sopenharmony_ci		ti,dscr-dev-enable = <13>;
428c2ecf20Sopenharmony_ci		ti,emifa-burst-priority = <255>;
438c2ecf20Sopenharmony_ci		ti,emifa-ce-config = <0x00240120
448c2ecf20Sopenharmony_ci				      0x00240120
458c2ecf20Sopenharmony_ci				      0x00240122
468c2ecf20Sopenharmony_ci				      0x00240122>;
478c2ecf20Sopenharmony_ci
488c2ecf20Sopenharmony_ci		flash@3,0 {
498c2ecf20Sopenharmony_ci			#address-cells = <1>;
508c2ecf20Sopenharmony_ci			#size-cells = <1>;
518c2ecf20Sopenharmony_ci			compatible = "cfi-flash";
528c2ecf20Sopenharmony_ci			reg = <0x3 0x0 0x400000>;
538c2ecf20Sopenharmony_ci			bank-width = <1>;
548c2ecf20Sopenharmony_ci			device-width = <1>;
558c2ecf20Sopenharmony_ci			partition@0 {
568c2ecf20Sopenharmony_ci				reg = <0x0 0x400000>;
578c2ecf20Sopenharmony_ci				label = "NOR";
588c2ecf20Sopenharmony_ci			};
598c2ecf20Sopenharmony_ci		};
608c2ecf20Sopenharmony_ci	};
618c2ecf20Sopenharmony_ci
628c2ecf20Sopenharmony_ciThis shows a flash chip attached to chip select 3.
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