18c2ecf20Sopenharmony_ciSP810 System Controller 28c2ecf20Sopenharmony_ci----------------------- 38c2ecf20Sopenharmony_ci 48c2ecf20Sopenharmony_ciRequired properties: 58c2ecf20Sopenharmony_ci 68c2ecf20Sopenharmony_ci- compatible: standard compatible string for a Primecell peripheral, 78c2ecf20Sopenharmony_ci see Documentation/devicetree/bindings/arm/primecell.yaml 88c2ecf20Sopenharmony_ci for more details 98c2ecf20Sopenharmony_ci should be: "arm,sp810", "arm,primecell" 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ci- reg: standard registers property, physical address and size 128c2ecf20Sopenharmony_ci of the control registers 138c2ecf20Sopenharmony_ci 148c2ecf20Sopenharmony_ci- clock-names: from the common clock bindings, for more details see 158c2ecf20Sopenharmony_ci Documentation/devicetree/bindings/clock/clock-bindings.txt; 168c2ecf20Sopenharmony_ci should be: "refclk", "timclk", "apb_pclk" 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_ci- clocks: from the common clock bindings, phandle and clock 198c2ecf20Sopenharmony_ci specifier pairs for the entries of clock-names property 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ci- #clock-cells: from the common clock bindings; 228c2ecf20Sopenharmony_ci should be: <1> 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci- clock-output-names: from the common clock bindings; 258c2ecf20Sopenharmony_ci should be: "timerclken0", "timerclken1", "timerclken2", "timerclken3" 268c2ecf20Sopenharmony_ci 278c2ecf20Sopenharmony_ci- assigned-clocks: from the common clock binding; 288c2ecf20Sopenharmony_ci should be: clock specifier for each output clock of this 298c2ecf20Sopenharmony_ci provider node 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ci- assigned-clock-parents: from the common clock binding; 328c2ecf20Sopenharmony_ci should be: phandle of input clock listed in clocks 338c2ecf20Sopenharmony_ci property with the highest frequency 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_ciExample: 368c2ecf20Sopenharmony_ci v2m_sysctl: sysctl@20000 { 378c2ecf20Sopenharmony_ci compatible = "arm,sp810", "arm,primecell"; 388c2ecf20Sopenharmony_ci reg = <0x020000 0x1000>; 398c2ecf20Sopenharmony_ci clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&smbclk>; 408c2ecf20Sopenharmony_ci clock-names = "refclk", "timclk", "apb_pclk"; 418c2ecf20Sopenharmony_ci #clock-cells = <1>; 428c2ecf20Sopenharmony_ci clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3"; 438c2ecf20Sopenharmony_ci assigned-clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_sysctl 3>, <&v2m_sysctl 3>; 448c2ecf20Sopenharmony_ci assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>; 458c2ecf20Sopenharmony_ci 468c2ecf20Sopenharmony_ci }; 47