18c2ecf20Sopenharmony_ciMediatek IPU controller 28c2ecf20Sopenharmony_ci============================ 38c2ecf20Sopenharmony_ci 48c2ecf20Sopenharmony_ciThe Mediatek ipu controller provides various clocks to the system. 58c2ecf20Sopenharmony_ci 68c2ecf20Sopenharmony_ciRequired Properties: 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ci- compatible: Should be one of: 98c2ecf20Sopenharmony_ci - "mediatek,mt8183-ipu_conn", "syscon" 108c2ecf20Sopenharmony_ci - "mediatek,mt8183-ipu_adl", "syscon" 118c2ecf20Sopenharmony_ci - "mediatek,mt8183-ipu_core0", "syscon" 128c2ecf20Sopenharmony_ci - "mediatek,mt8183-ipu_core1", "syscon" 138c2ecf20Sopenharmony_ci- #clock-cells: Must be 1 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_ciThe ipu controller uses the common clk binding from 168c2ecf20Sopenharmony_ciDocumentation/devicetree/bindings/clock/clock-bindings.txt 178c2ecf20Sopenharmony_ciThe available clocks are defined in dt-bindings/clock/mt*-clk.h. 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ciExample: 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ciipu_conn: syscon@19000000 { 228c2ecf20Sopenharmony_ci compatible = "mediatek,mt8183-ipu_conn", "syscon"; 238c2ecf20Sopenharmony_ci reg = <0 0x19000000 0 0x1000>; 248c2ecf20Sopenharmony_ci #clock-cells = <1>; 258c2ecf20Sopenharmony_ci}; 268c2ecf20Sopenharmony_ci 278c2ecf20Sopenharmony_ciipu_adl: syscon@19010000 { 288c2ecf20Sopenharmony_ci compatible = "mediatek,mt8183-ipu_adl", "syscon"; 298c2ecf20Sopenharmony_ci reg = <0 0x19010000 0 0x1000>; 308c2ecf20Sopenharmony_ci #clock-cells = <1>; 318c2ecf20Sopenharmony_ci}; 328c2ecf20Sopenharmony_ci 338c2ecf20Sopenharmony_ciipu_core0: syscon@19180000 { 348c2ecf20Sopenharmony_ci compatible = "mediatek,mt8183-ipu_core0", "syscon"; 358c2ecf20Sopenharmony_ci reg = <0 0x19180000 0 0x1000>; 368c2ecf20Sopenharmony_ci #clock-cells = <1>; 378c2ecf20Sopenharmony_ci}; 388c2ecf20Sopenharmony_ci 398c2ecf20Sopenharmony_ciipu_core1: syscon@19280000 { 408c2ecf20Sopenharmony_ci compatible = "mediatek,mt8183-ipu_core1", "syscon"; 418c2ecf20Sopenharmony_ci reg = <0 0x19280000 0 0x1000>; 428c2ecf20Sopenharmony_ci #clock-cells = <1>; 438c2ecf20Sopenharmony_ci}; 44