18c2ecf20Sopenharmony_ciMediatek mmsys controller 28c2ecf20Sopenharmony_ci============================ 38c2ecf20Sopenharmony_ci 48c2ecf20Sopenharmony_ciThe Mediatek mmsys system controller provides clock control, routing control, 58c2ecf20Sopenharmony_ciand miscellaneous control in mmsys partition. 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ciRequired Properties: 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_ci- compatible: Should be one of: 108c2ecf20Sopenharmony_ci - "mediatek,mt2701-mmsys", "syscon" 118c2ecf20Sopenharmony_ci - "mediatek,mt2712-mmsys", "syscon" 128c2ecf20Sopenharmony_ci - "mediatek,mt6765-mmsys", "syscon" 138c2ecf20Sopenharmony_ci - "mediatek,mt6779-mmsys", "syscon" 148c2ecf20Sopenharmony_ci - "mediatek,mt6797-mmsys", "syscon" 158c2ecf20Sopenharmony_ci - "mediatek,mt7623-mmsys", "mediatek,mt2701-mmsys", "syscon" 168c2ecf20Sopenharmony_ci - "mediatek,mt8173-mmsys", "syscon" 178c2ecf20Sopenharmony_ci - "mediatek,mt8183-mmsys", "syscon" 188c2ecf20Sopenharmony_ci- #clock-cells: Must be 1 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ciFor the clock control, the mmsys controller uses the common clk binding from 218c2ecf20Sopenharmony_ciDocumentation/devicetree/bindings/clock/clock-bindings.txt 228c2ecf20Sopenharmony_ciThe available clocks are defined in dt-bindings/clock/mt*-clk.h. 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ciExample: 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_cimmsys: syscon@14000000 { 278c2ecf20Sopenharmony_ci compatible = "mediatek,mt8173-mmsys", "syscon"; 288c2ecf20Sopenharmony_ci reg = <0 0x14000000 0 0x1000>; 298c2ecf20Sopenharmony_ci #clock-cells = <1>; 308c2ecf20Sopenharmony_ci}; 31