18c2ecf20Sopenharmony_ciMarvell Kirkwood Platforms Device Tree Bindings 28c2ecf20Sopenharmony_ci----------------------------------------------- 38c2ecf20Sopenharmony_ci 48c2ecf20Sopenharmony_ciBoards with a SoC of the Marvell Kirkwood 58c2ecf20Sopenharmony_cishall have the following property: 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ciRequired root node property: 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_cicompatible: must contain "marvell,kirkwood"; 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ciIn order to support the kirkwood cpufreq driver, there must be a node 128c2ecf20Sopenharmony_cicpus/cpu@0 with three clocks, "cpu_clk", "ddrclk" and "powersave", 138c2ecf20Sopenharmony_ciwhere the "powersave" clock is a gating clock used to switch the CPU 148c2ecf20Sopenharmony_cibetween the "cpu_clk" and the "ddrclk". 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_ciExample: 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_ci cpus { 198c2ecf20Sopenharmony_ci #address-cells = <1>; 208c2ecf20Sopenharmony_ci #size-cells = <0>; 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ci cpu@0 { 238c2ecf20Sopenharmony_ci device_type = "cpu"; 248c2ecf20Sopenharmony_ci compatible = "marvell,sheeva-88SV131"; 258c2ecf20Sopenharmony_ci clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>; 268c2ecf20Sopenharmony_ci clock-names = "cpu_clk", "ddrclk", "powersave"; 278c2ecf20Sopenharmony_ci }; 28