18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
28c2ecf20Sopenharmony_ci%YAML 1.2
38c2ecf20Sopenharmony_ci---
48c2ecf20Sopenharmony_ci$id: http://devicetree.org/schemas/arm/idle-states.yaml#
58c2ecf20Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_cititle: ARM idle states binding description
88c2ecf20Sopenharmony_ci
98c2ecf20Sopenharmony_cimaintainers:
108c2ecf20Sopenharmony_ci  - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
118c2ecf20Sopenharmony_ci
128c2ecf20Sopenharmony_cidescription: |+
138c2ecf20Sopenharmony_ci  ==========================================
148c2ecf20Sopenharmony_ci  1 - Introduction
158c2ecf20Sopenharmony_ci  ==========================================
168c2ecf20Sopenharmony_ci
178c2ecf20Sopenharmony_ci  ARM systems contain HW capable of managing power consumption dynamically,
188c2ecf20Sopenharmony_ci  where cores can be put in different low-power states (ranging from simple wfi
198c2ecf20Sopenharmony_ci  to power gating) according to OS PM policies. The CPU states representing the
208c2ecf20Sopenharmony_ci  range of dynamic idle states that a processor can enter at run-time, can be
218c2ecf20Sopenharmony_ci  specified through device tree bindings representing the parameters required to
228c2ecf20Sopenharmony_ci  enter/exit specific idle states on a given processor.
238c2ecf20Sopenharmony_ci
248c2ecf20Sopenharmony_ci  According to the Server Base System Architecture document (SBSA, [3]), the
258c2ecf20Sopenharmony_ci  power states an ARM CPU can be put into are identified by the following list:
268c2ecf20Sopenharmony_ci
278c2ecf20Sopenharmony_ci  - Running
288c2ecf20Sopenharmony_ci  - Idle_standby
298c2ecf20Sopenharmony_ci  - Idle_retention
308c2ecf20Sopenharmony_ci  - Sleep
318c2ecf20Sopenharmony_ci  - Off
328c2ecf20Sopenharmony_ci
338c2ecf20Sopenharmony_ci  The power states described in the SBSA document define the basic CPU states on
348c2ecf20Sopenharmony_ci  top of which ARM platforms implement power management schemes that allow an OS
358c2ecf20Sopenharmony_ci  PM implementation to put the processor in different idle states (which include
368c2ecf20Sopenharmony_ci  states listed above; "off" state is not an idle state since it does not have
378c2ecf20Sopenharmony_ci  wake-up capabilities, hence it is not considered in this document).
388c2ecf20Sopenharmony_ci
398c2ecf20Sopenharmony_ci  Idle state parameters (e.g. entry latency) are platform specific and need to
408c2ecf20Sopenharmony_ci  be characterized with bindings that provide the required information to OS PM
418c2ecf20Sopenharmony_ci  code so that it can build the required tables and use them at runtime.
428c2ecf20Sopenharmony_ci
438c2ecf20Sopenharmony_ci  The device tree binding definition for ARM idle states is the subject of this
448c2ecf20Sopenharmony_ci  document.
458c2ecf20Sopenharmony_ci
468c2ecf20Sopenharmony_ci  ===========================================
478c2ecf20Sopenharmony_ci  2 - idle-states definitions
488c2ecf20Sopenharmony_ci  ===========================================
498c2ecf20Sopenharmony_ci
508c2ecf20Sopenharmony_ci  Idle states are characterized for a specific system through a set of
518c2ecf20Sopenharmony_ci  timing and energy related properties, that underline the HW behaviour
528c2ecf20Sopenharmony_ci  triggered upon idle states entry and exit.
538c2ecf20Sopenharmony_ci
548c2ecf20Sopenharmony_ci  The following diagram depicts the CPU execution phases and related timing
558c2ecf20Sopenharmony_ci  properties required to enter and exit an idle state:
568c2ecf20Sopenharmony_ci
578c2ecf20Sopenharmony_ci  ..__[EXEC]__|__[PREP]__|__[ENTRY]__|__[IDLE]__|__[EXIT]__|__[EXEC]__..
588c2ecf20Sopenharmony_ci              |          |           |          |          |
598c2ecf20Sopenharmony_ci
608c2ecf20Sopenharmony_ci              |<------ entry ------->|
618c2ecf20Sopenharmony_ci              |       latency        |
628c2ecf20Sopenharmony_ci                                                |<- exit ->|
638c2ecf20Sopenharmony_ci                                                |  latency |
648c2ecf20Sopenharmony_ci              |<-------- min-residency -------->|
658c2ecf20Sopenharmony_ci                         |<-------  wakeup-latency ------->|
668c2ecf20Sopenharmony_ci
678c2ecf20Sopenharmony_ci      Diagram 1: CPU idle state execution phases
688c2ecf20Sopenharmony_ci
698c2ecf20Sopenharmony_ci  EXEC:  Normal CPU execution.
708c2ecf20Sopenharmony_ci
718c2ecf20Sopenharmony_ci  PREP:  Preparation phase before committing the hardware to idle mode
728c2ecf20Sopenharmony_ci    like cache flushing. This is abortable on pending wake-up
738c2ecf20Sopenharmony_ci    event conditions. The abort latency is assumed to be negligible
748c2ecf20Sopenharmony_ci    (i.e. less than the ENTRY + EXIT duration). If aborted, CPU
758c2ecf20Sopenharmony_ci    goes back to EXEC. This phase is optional. If not abortable,
768c2ecf20Sopenharmony_ci    this should be included in the ENTRY phase instead.
778c2ecf20Sopenharmony_ci
788c2ecf20Sopenharmony_ci  ENTRY:  The hardware is committed to idle mode. This period must run
798c2ecf20Sopenharmony_ci    to completion up to IDLE before anything else can happen.
808c2ecf20Sopenharmony_ci
818c2ecf20Sopenharmony_ci  IDLE:  This is the actual energy-saving idle period. This may last
828c2ecf20Sopenharmony_ci    between 0 and infinite time, until a wake-up event occurs.
838c2ecf20Sopenharmony_ci
848c2ecf20Sopenharmony_ci  EXIT:  Period during which the CPU is brought back to operational
858c2ecf20Sopenharmony_ci    mode (EXEC).
868c2ecf20Sopenharmony_ci
878c2ecf20Sopenharmony_ci  entry-latency: Worst case latency required to enter the idle state. The
888c2ecf20Sopenharmony_ci  exit-latency may be guaranteed only after entry-latency has passed.
898c2ecf20Sopenharmony_ci
908c2ecf20Sopenharmony_ci  min-residency: Minimum period, including preparation and entry, for a given
918c2ecf20Sopenharmony_ci  idle state to be worthwhile energywise.
928c2ecf20Sopenharmony_ci
938c2ecf20Sopenharmony_ci  wakeup-latency: Maximum delay between the signaling of a wake-up event and the
948c2ecf20Sopenharmony_ci  CPU being able to execute normal code again. If not specified, this is assumed
958c2ecf20Sopenharmony_ci  to be entry-latency + exit-latency.
968c2ecf20Sopenharmony_ci
978c2ecf20Sopenharmony_ci  These timing parameters can be used by an OS in different circumstances.
988c2ecf20Sopenharmony_ci
998c2ecf20Sopenharmony_ci  An idle CPU requires the expected min-residency time to select the most
1008c2ecf20Sopenharmony_ci  appropriate idle state based on the expected expiry time of the next IRQ
1018c2ecf20Sopenharmony_ci  (i.e. wake-up) that causes the CPU to return to the EXEC phase.
1028c2ecf20Sopenharmony_ci
1038c2ecf20Sopenharmony_ci  An operating system scheduler may need to compute the shortest wake-up delay
1048c2ecf20Sopenharmony_ci  for CPUs in the system by detecting how long will it take to get a CPU out
1058c2ecf20Sopenharmony_ci  of an idle state, e.g.:
1068c2ecf20Sopenharmony_ci
1078c2ecf20Sopenharmony_ci  wakeup-delay = exit-latency + max(entry-latency - (now - entry-timestamp), 0)
1088c2ecf20Sopenharmony_ci
1098c2ecf20Sopenharmony_ci  In other words, the scheduler can make its scheduling decision by selecting
1108c2ecf20Sopenharmony_ci  (e.g. waking-up) the CPU with the shortest wake-up delay.
1118c2ecf20Sopenharmony_ci  The wake-up delay must take into account the entry latency if that period
1128c2ecf20Sopenharmony_ci  has not expired. The abortable nature of the PREP period can be ignored
1138c2ecf20Sopenharmony_ci  if it cannot be relied upon (e.g. the PREP deadline may occur much sooner than
1148c2ecf20Sopenharmony_ci  the worst case since it depends on the CPU operating conditions, i.e. caches
1158c2ecf20Sopenharmony_ci  state).
1168c2ecf20Sopenharmony_ci
1178c2ecf20Sopenharmony_ci  An OS has to reliably probe the wakeup-latency since some devices can enforce
1188c2ecf20Sopenharmony_ci  latency constraint guarantees to work properly, so the OS has to detect the
1198c2ecf20Sopenharmony_ci  worst case wake-up latency it can incur if a CPU is allowed to enter an
1208c2ecf20Sopenharmony_ci  idle state, and possibly to prevent that to guarantee reliable device
1218c2ecf20Sopenharmony_ci  functioning.
1228c2ecf20Sopenharmony_ci
1238c2ecf20Sopenharmony_ci  The min-residency time parameter deserves further explanation since it is
1248c2ecf20Sopenharmony_ci  expressed in time units but must factor in energy consumption coefficients.
1258c2ecf20Sopenharmony_ci
1268c2ecf20Sopenharmony_ci  The energy consumption of a cpu when it enters a power state can be roughly
1278c2ecf20Sopenharmony_ci  characterised by the following graph:
1288c2ecf20Sopenharmony_ci
1298c2ecf20Sopenharmony_ci                 |
1308c2ecf20Sopenharmony_ci                 |
1318c2ecf20Sopenharmony_ci                 |
1328c2ecf20Sopenharmony_ci             e   |
1338c2ecf20Sopenharmony_ci             n   |                                      /---
1348c2ecf20Sopenharmony_ci             e   |                               /------
1358c2ecf20Sopenharmony_ci             r   |                        /------
1368c2ecf20Sopenharmony_ci             g   |                  /-----
1378c2ecf20Sopenharmony_ci             y   |           /------
1388c2ecf20Sopenharmony_ci                 |       ----
1398c2ecf20Sopenharmony_ci                 |      /|
1408c2ecf20Sopenharmony_ci                 |     / |
1418c2ecf20Sopenharmony_ci                 |    /  |
1428c2ecf20Sopenharmony_ci                 |   /   |
1438c2ecf20Sopenharmony_ci                 |  /    |
1448c2ecf20Sopenharmony_ci                 | /     |
1458c2ecf20Sopenharmony_ci                 |/      |
1468c2ecf20Sopenharmony_ci            -----|-------+----------------------------------
1478c2ecf20Sopenharmony_ci                0|       1                              time(ms)
1488c2ecf20Sopenharmony_ci
1498c2ecf20Sopenharmony_ci      Graph 1: Energy vs time example
1508c2ecf20Sopenharmony_ci
1518c2ecf20Sopenharmony_ci  The graph is split in two parts delimited by time 1ms on the X-axis.
1528c2ecf20Sopenharmony_ci  The graph curve with X-axis values = { x | 0 < x < 1ms } has a steep slope
1538c2ecf20Sopenharmony_ci  and denotes the energy costs incurred while entering and leaving the idle
1548c2ecf20Sopenharmony_ci  state.
1558c2ecf20Sopenharmony_ci  The graph curve in the area delimited by X-axis values = {x | x > 1ms } has
1568c2ecf20Sopenharmony_ci  shallower slope and essentially represents the energy consumption of the idle
1578c2ecf20Sopenharmony_ci  state.
1588c2ecf20Sopenharmony_ci
1598c2ecf20Sopenharmony_ci  min-residency is defined for a given idle state as the minimum expected
1608c2ecf20Sopenharmony_ci  residency time for a state (inclusive of preparation and entry) after
1618c2ecf20Sopenharmony_ci  which choosing that state become the most energy efficient option. A good
1628c2ecf20Sopenharmony_ci  way to visualise this, is by taking the same graph above and comparing some
1638c2ecf20Sopenharmony_ci  states energy consumptions plots.
1648c2ecf20Sopenharmony_ci
1658c2ecf20Sopenharmony_ci  For sake of simplicity, let's consider a system with two idle states IDLE1,
1668c2ecf20Sopenharmony_ci  and IDLE2:
1678c2ecf20Sopenharmony_ci
1688c2ecf20Sopenharmony_ci            |
1698c2ecf20Sopenharmony_ci            |
1708c2ecf20Sopenharmony_ci            |
1718c2ecf20Sopenharmony_ci            |                                                  /-- IDLE1
1728c2ecf20Sopenharmony_ci         e  |                                              /---
1738c2ecf20Sopenharmony_ci         n  |                                         /----
1748c2ecf20Sopenharmony_ci         e  |                                     /---
1758c2ecf20Sopenharmony_ci         r  |                                /-----/--------- IDLE2
1768c2ecf20Sopenharmony_ci         g  |                    /-------/---------
1778c2ecf20Sopenharmony_ci         y  |        ------------    /---|
1788c2ecf20Sopenharmony_ci            |       /           /----    |
1798c2ecf20Sopenharmony_ci            |      /        /---         |
1808c2ecf20Sopenharmony_ci            |     /    /----             |
1818c2ecf20Sopenharmony_ci            |    / /---                  |
1828c2ecf20Sopenharmony_ci            |   ---                      |
1838c2ecf20Sopenharmony_ci            |  /                         |
1848c2ecf20Sopenharmony_ci            | /                          |
1858c2ecf20Sopenharmony_ci            |/                           |                  time
1868c2ecf20Sopenharmony_ci         ---/----------------------------+------------------------
1878c2ecf20Sopenharmony_ci            |IDLE1-energy < IDLE2-energy | IDLE2-energy < IDLE1-energy
1888c2ecf20Sopenharmony_ci                                         |
1898c2ecf20Sopenharmony_ci                                  IDLE2-min-residency
1908c2ecf20Sopenharmony_ci
1918c2ecf20Sopenharmony_ci      Graph 2: idle states min-residency example
1928c2ecf20Sopenharmony_ci
1938c2ecf20Sopenharmony_ci  In graph 2 above, that takes into account idle states entry/exit energy
1948c2ecf20Sopenharmony_ci  costs, it is clear that if the idle state residency time (i.e. time till next
1958c2ecf20Sopenharmony_ci  wake-up IRQ) is less than IDLE2-min-residency, IDLE1 is the better idle state
1968c2ecf20Sopenharmony_ci  choice energywise.
1978c2ecf20Sopenharmony_ci
1988c2ecf20Sopenharmony_ci  This is mainly down to the fact that IDLE1 entry/exit energy costs are lower
1998c2ecf20Sopenharmony_ci  than IDLE2.
2008c2ecf20Sopenharmony_ci
2018c2ecf20Sopenharmony_ci  However, the lower power consumption (i.e. shallower energy curve slope) of
2028c2ecf20Sopenharmony_ci  idle state IDLE2 implies that after a suitable time, IDLE2 becomes more energy
2038c2ecf20Sopenharmony_ci  efficient.
2048c2ecf20Sopenharmony_ci
2058c2ecf20Sopenharmony_ci  The time at which IDLE2 becomes more energy efficient than IDLE1 (and other
2068c2ecf20Sopenharmony_ci  shallower states in a system with multiple idle states) is defined
2078c2ecf20Sopenharmony_ci  IDLE2-min-residency and corresponds to the time when energy consumption of
2088c2ecf20Sopenharmony_ci  IDLE1 and IDLE2 states breaks even.
2098c2ecf20Sopenharmony_ci
2108c2ecf20Sopenharmony_ci  The definitions provided in this section underpin the idle states
2118c2ecf20Sopenharmony_ci  properties specification that is the subject of the following sections.
2128c2ecf20Sopenharmony_ci
2138c2ecf20Sopenharmony_ci  ===========================================
2148c2ecf20Sopenharmony_ci  3 - idle-states node
2158c2ecf20Sopenharmony_ci  ===========================================
2168c2ecf20Sopenharmony_ci
2178c2ecf20Sopenharmony_ci  ARM processor idle states are defined within the idle-states node, which is
2188c2ecf20Sopenharmony_ci  a direct child of the cpus node [1] and provides a container where the
2198c2ecf20Sopenharmony_ci  processor idle states, defined as device tree nodes, are listed.
2208c2ecf20Sopenharmony_ci
2218c2ecf20Sopenharmony_ci  On ARM systems, it is a container of processor idle states nodes. If the
2228c2ecf20Sopenharmony_ci  system does not provide CPU power management capabilities, or the processor
2238c2ecf20Sopenharmony_ci  just supports idle_standby, an idle-states node is not required.
2248c2ecf20Sopenharmony_ci
2258c2ecf20Sopenharmony_ci  ===========================================
2268c2ecf20Sopenharmony_ci  4 - References
2278c2ecf20Sopenharmony_ci  ===========================================
2288c2ecf20Sopenharmony_ci
2298c2ecf20Sopenharmony_ci  [1] ARM Linux Kernel documentation - CPUs bindings
2308c2ecf20Sopenharmony_ci      Documentation/devicetree/bindings/arm/cpus.yaml
2318c2ecf20Sopenharmony_ci
2328c2ecf20Sopenharmony_ci  [2] ARM Linux Kernel documentation - PSCI bindings
2338c2ecf20Sopenharmony_ci      Documentation/devicetree/bindings/arm/psci.yaml
2348c2ecf20Sopenharmony_ci
2358c2ecf20Sopenharmony_ci  [3] ARM Server Base System Architecture (SBSA)
2368c2ecf20Sopenharmony_ci      http://infocenter.arm.com/help/index.jsp
2378c2ecf20Sopenharmony_ci
2388c2ecf20Sopenharmony_ci  [4] ARM Architecture Reference Manuals
2398c2ecf20Sopenharmony_ci      http://infocenter.arm.com/help/index.jsp
2408c2ecf20Sopenharmony_ci
2418c2ecf20Sopenharmony_ci  [6] ARM Linux Kernel documentation - Booting AArch64 Linux
2428c2ecf20Sopenharmony_ci      Documentation/arm64/booting.rst
2438c2ecf20Sopenharmony_ci
2448c2ecf20Sopenharmony_ciproperties:
2458c2ecf20Sopenharmony_ci  $nodename:
2468c2ecf20Sopenharmony_ci    const: idle-states
2478c2ecf20Sopenharmony_ci
2488c2ecf20Sopenharmony_ci  entry-method:
2498c2ecf20Sopenharmony_ci    description: |
2508c2ecf20Sopenharmony_ci      Usage and definition depend on ARM architecture version.
2518c2ecf20Sopenharmony_ci
2528c2ecf20Sopenharmony_ci      On ARM v8 64-bit this property is required.
2538c2ecf20Sopenharmony_ci      On ARM 32-bit systems this property is optional
2548c2ecf20Sopenharmony_ci
2558c2ecf20Sopenharmony_ci      This assumes that the "enable-method" property is set to "psci" in the cpu
2568c2ecf20Sopenharmony_ci      node[6] that is responsible for setting up CPU idle management in the OS
2578c2ecf20Sopenharmony_ci      implementation.
2588c2ecf20Sopenharmony_ci    const: psci
2598c2ecf20Sopenharmony_ci
2608c2ecf20Sopenharmony_cipatternProperties:
2618c2ecf20Sopenharmony_ci  "^(cpu|cluster)-":
2628c2ecf20Sopenharmony_ci    type: object
2638c2ecf20Sopenharmony_ci    description: |
2648c2ecf20Sopenharmony_ci      Each state node represents an idle state description and must be defined
2658c2ecf20Sopenharmony_ci      as follows.
2668c2ecf20Sopenharmony_ci
2678c2ecf20Sopenharmony_ci      The idle state entered by executing the wfi instruction (idle_standby
2688c2ecf20Sopenharmony_ci      SBSA,[3][4]) is considered standard on all ARM platforms and therefore
2698c2ecf20Sopenharmony_ci      must not be listed.
2708c2ecf20Sopenharmony_ci
2718c2ecf20Sopenharmony_ci      In addition to the properties listed above, a state node may require
2728c2ecf20Sopenharmony_ci      additional properties specific to the entry-method defined in the
2738c2ecf20Sopenharmony_ci      idle-states node. Please refer to the entry-method bindings
2748c2ecf20Sopenharmony_ci      documentation for properties definitions.
2758c2ecf20Sopenharmony_ci
2768c2ecf20Sopenharmony_ci    properties:
2778c2ecf20Sopenharmony_ci      compatible:
2788c2ecf20Sopenharmony_ci        const: arm,idle-state
2798c2ecf20Sopenharmony_ci
2808c2ecf20Sopenharmony_ci      local-timer-stop:
2818c2ecf20Sopenharmony_ci        description:
2828c2ecf20Sopenharmony_ci          If present the CPU local timer control logic is
2838c2ecf20Sopenharmony_ci             lost on state entry, otherwise it is retained.
2848c2ecf20Sopenharmony_ci        type: boolean
2858c2ecf20Sopenharmony_ci
2868c2ecf20Sopenharmony_ci      entry-latency-us:
2878c2ecf20Sopenharmony_ci        description:
2888c2ecf20Sopenharmony_ci          Worst case latency in microseconds required to enter the idle state.
2898c2ecf20Sopenharmony_ci
2908c2ecf20Sopenharmony_ci      exit-latency-us:
2918c2ecf20Sopenharmony_ci        description:
2928c2ecf20Sopenharmony_ci          Worst case latency in microseconds required to exit the idle state.
2938c2ecf20Sopenharmony_ci          The exit-latency-us duration may be guaranteed only after
2948c2ecf20Sopenharmony_ci          entry-latency-us has passed.
2958c2ecf20Sopenharmony_ci
2968c2ecf20Sopenharmony_ci      min-residency-us:
2978c2ecf20Sopenharmony_ci        description:
2988c2ecf20Sopenharmony_ci          Minimum residency duration in microseconds, inclusive of preparation
2998c2ecf20Sopenharmony_ci          and entry, for this idle state to be considered worthwhile energy wise
3008c2ecf20Sopenharmony_ci          (refer to section 2 of this document for a complete description).
3018c2ecf20Sopenharmony_ci
3028c2ecf20Sopenharmony_ci      wakeup-latency-us:
3038c2ecf20Sopenharmony_ci        description: |
3048c2ecf20Sopenharmony_ci          Maximum delay between the signaling of a wake-up event and the CPU
3058c2ecf20Sopenharmony_ci          being able to execute normal code again. If omitted, this is assumed
3068c2ecf20Sopenharmony_ci          to be equal to:
3078c2ecf20Sopenharmony_ci
3088c2ecf20Sopenharmony_ci            entry-latency-us + exit-latency-us
3098c2ecf20Sopenharmony_ci
3108c2ecf20Sopenharmony_ci          It is important to supply this value on systems where the duration of
3118c2ecf20Sopenharmony_ci          PREP phase (see diagram 1, section 2) is non-neglibigle. In such
3128c2ecf20Sopenharmony_ci          systems entry-latency-us + exit-latency-us will exceed
3138c2ecf20Sopenharmony_ci          wakeup-latency-us by this duration.
3148c2ecf20Sopenharmony_ci
3158c2ecf20Sopenharmony_ci      idle-state-name:
3168c2ecf20Sopenharmony_ci        $ref: /schemas/types.yaml#definitions/string
3178c2ecf20Sopenharmony_ci        description:
3188c2ecf20Sopenharmony_ci          A string used as a descriptive name for the idle state.
3198c2ecf20Sopenharmony_ci
3208c2ecf20Sopenharmony_ci    required:
3218c2ecf20Sopenharmony_ci      - compatible
3228c2ecf20Sopenharmony_ci      - entry-latency-us
3238c2ecf20Sopenharmony_ci      - exit-latency-us
3248c2ecf20Sopenharmony_ci      - min-residency-us
3258c2ecf20Sopenharmony_ci
3268c2ecf20Sopenharmony_ciadditionalProperties: false
3278c2ecf20Sopenharmony_ci
3288c2ecf20Sopenharmony_ciexamples:
3298c2ecf20Sopenharmony_ci  - |
3308c2ecf20Sopenharmony_ci
3318c2ecf20Sopenharmony_ci    cpus {
3328c2ecf20Sopenharmony_ci        #size-cells = <0>;
3338c2ecf20Sopenharmony_ci        #address-cells = <2>;
3348c2ecf20Sopenharmony_ci
3358c2ecf20Sopenharmony_ci        cpu@0 {
3368c2ecf20Sopenharmony_ci            device_type = "cpu";
3378c2ecf20Sopenharmony_ci            compatible = "arm,cortex-a57";
3388c2ecf20Sopenharmony_ci            reg = <0x0 0x0>;
3398c2ecf20Sopenharmony_ci            enable-method = "psci";
3408c2ecf20Sopenharmony_ci            cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
3418c2ecf20Sopenharmony_ci                   &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;
3428c2ecf20Sopenharmony_ci        };
3438c2ecf20Sopenharmony_ci
3448c2ecf20Sopenharmony_ci        cpu@1 {
3458c2ecf20Sopenharmony_ci            device_type = "cpu";
3468c2ecf20Sopenharmony_ci            compatible = "arm,cortex-a57";
3478c2ecf20Sopenharmony_ci            reg = <0x0 0x1>;
3488c2ecf20Sopenharmony_ci            enable-method = "psci";
3498c2ecf20Sopenharmony_ci            cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
3508c2ecf20Sopenharmony_ci                   &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;
3518c2ecf20Sopenharmony_ci        };
3528c2ecf20Sopenharmony_ci
3538c2ecf20Sopenharmony_ci        cpu@100 {
3548c2ecf20Sopenharmony_ci            device_type = "cpu";
3558c2ecf20Sopenharmony_ci            compatible = "arm,cortex-a57";
3568c2ecf20Sopenharmony_ci            reg = <0x0 0x100>;
3578c2ecf20Sopenharmony_ci            enable-method = "psci";
3588c2ecf20Sopenharmony_ci            cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
3598c2ecf20Sopenharmony_ci                   &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;
3608c2ecf20Sopenharmony_ci        };
3618c2ecf20Sopenharmony_ci
3628c2ecf20Sopenharmony_ci        cpu@101 {
3638c2ecf20Sopenharmony_ci            device_type = "cpu";
3648c2ecf20Sopenharmony_ci            compatible = "arm,cortex-a57";
3658c2ecf20Sopenharmony_ci            reg = <0x0 0x101>;
3668c2ecf20Sopenharmony_ci            enable-method = "psci";
3678c2ecf20Sopenharmony_ci            cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
3688c2ecf20Sopenharmony_ci                   &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;
3698c2ecf20Sopenharmony_ci        };
3708c2ecf20Sopenharmony_ci
3718c2ecf20Sopenharmony_ci        cpu@10000 {
3728c2ecf20Sopenharmony_ci            device_type = "cpu";
3738c2ecf20Sopenharmony_ci            compatible = "arm,cortex-a57";
3748c2ecf20Sopenharmony_ci            reg = <0x0 0x10000>;
3758c2ecf20Sopenharmony_ci            enable-method = "psci";
3768c2ecf20Sopenharmony_ci            cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
3778c2ecf20Sopenharmony_ci                   &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;
3788c2ecf20Sopenharmony_ci        };
3798c2ecf20Sopenharmony_ci
3808c2ecf20Sopenharmony_ci        cpu@10001 {
3818c2ecf20Sopenharmony_ci            device_type = "cpu";
3828c2ecf20Sopenharmony_ci            compatible = "arm,cortex-a57";
3838c2ecf20Sopenharmony_ci            reg = <0x0 0x10001>;
3848c2ecf20Sopenharmony_ci            enable-method = "psci";
3858c2ecf20Sopenharmony_ci            cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
3868c2ecf20Sopenharmony_ci                   &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;
3878c2ecf20Sopenharmony_ci        };
3888c2ecf20Sopenharmony_ci
3898c2ecf20Sopenharmony_ci        cpu@10100 {
3908c2ecf20Sopenharmony_ci            device_type = "cpu";
3918c2ecf20Sopenharmony_ci            compatible = "arm,cortex-a57";
3928c2ecf20Sopenharmony_ci            reg = <0x0 0x10100>;
3938c2ecf20Sopenharmony_ci            enable-method = "psci";
3948c2ecf20Sopenharmony_ci            cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
3958c2ecf20Sopenharmony_ci                   &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;
3968c2ecf20Sopenharmony_ci        };
3978c2ecf20Sopenharmony_ci
3988c2ecf20Sopenharmony_ci        cpu@10101 {
3998c2ecf20Sopenharmony_ci            device_type = "cpu";
4008c2ecf20Sopenharmony_ci            compatible = "arm,cortex-a57";
4018c2ecf20Sopenharmony_ci            reg = <0x0 0x10101>;
4028c2ecf20Sopenharmony_ci            enable-method = "psci";
4038c2ecf20Sopenharmony_ci            cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
4048c2ecf20Sopenharmony_ci                   &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;
4058c2ecf20Sopenharmony_ci        };
4068c2ecf20Sopenharmony_ci
4078c2ecf20Sopenharmony_ci        cpu@100000000 {
4088c2ecf20Sopenharmony_ci            device_type = "cpu";
4098c2ecf20Sopenharmony_ci            compatible = "arm,cortex-a53";
4108c2ecf20Sopenharmony_ci            reg = <0x1 0x0>;
4118c2ecf20Sopenharmony_ci            enable-method = "psci";
4128c2ecf20Sopenharmony_ci            cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
4138c2ecf20Sopenharmony_ci                   &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;
4148c2ecf20Sopenharmony_ci        };
4158c2ecf20Sopenharmony_ci
4168c2ecf20Sopenharmony_ci        cpu@100000001 {
4178c2ecf20Sopenharmony_ci            device_type = "cpu";
4188c2ecf20Sopenharmony_ci            compatible = "arm,cortex-a53";
4198c2ecf20Sopenharmony_ci            reg = <0x1 0x1>;
4208c2ecf20Sopenharmony_ci            enable-method = "psci";
4218c2ecf20Sopenharmony_ci            cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
4228c2ecf20Sopenharmony_ci                   &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;
4238c2ecf20Sopenharmony_ci        };
4248c2ecf20Sopenharmony_ci
4258c2ecf20Sopenharmony_ci        cpu@100000100 {
4268c2ecf20Sopenharmony_ci            device_type = "cpu";
4278c2ecf20Sopenharmony_ci            compatible = "arm,cortex-a53";
4288c2ecf20Sopenharmony_ci            reg = <0x1 0x100>;
4298c2ecf20Sopenharmony_ci            enable-method = "psci";
4308c2ecf20Sopenharmony_ci            cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
4318c2ecf20Sopenharmony_ci                   &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;
4328c2ecf20Sopenharmony_ci        };
4338c2ecf20Sopenharmony_ci
4348c2ecf20Sopenharmony_ci        cpu@100000101 {
4358c2ecf20Sopenharmony_ci            device_type = "cpu";
4368c2ecf20Sopenharmony_ci            compatible = "arm,cortex-a53";
4378c2ecf20Sopenharmony_ci            reg = <0x1 0x101>;
4388c2ecf20Sopenharmony_ci            enable-method = "psci";
4398c2ecf20Sopenharmony_ci            cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
4408c2ecf20Sopenharmony_ci                   &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;
4418c2ecf20Sopenharmony_ci        };
4428c2ecf20Sopenharmony_ci
4438c2ecf20Sopenharmony_ci        cpu@100010000 {
4448c2ecf20Sopenharmony_ci            device_type = "cpu";
4458c2ecf20Sopenharmony_ci            compatible = "arm,cortex-a53";
4468c2ecf20Sopenharmony_ci            reg = <0x1 0x10000>;
4478c2ecf20Sopenharmony_ci            enable-method = "psci";
4488c2ecf20Sopenharmony_ci            cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
4498c2ecf20Sopenharmony_ci                   &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;
4508c2ecf20Sopenharmony_ci        };
4518c2ecf20Sopenharmony_ci
4528c2ecf20Sopenharmony_ci        cpu@100010001 {
4538c2ecf20Sopenharmony_ci            device_type = "cpu";
4548c2ecf20Sopenharmony_ci            compatible = "arm,cortex-a53";
4558c2ecf20Sopenharmony_ci            reg = <0x1 0x10001>;
4568c2ecf20Sopenharmony_ci            enable-method = "psci";
4578c2ecf20Sopenharmony_ci            cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
4588c2ecf20Sopenharmony_ci                   &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;
4598c2ecf20Sopenharmony_ci        };
4608c2ecf20Sopenharmony_ci
4618c2ecf20Sopenharmony_ci        cpu@100010100 {
4628c2ecf20Sopenharmony_ci            device_type = "cpu";
4638c2ecf20Sopenharmony_ci            compatible = "arm,cortex-a53";
4648c2ecf20Sopenharmony_ci            reg = <0x1 0x10100>;
4658c2ecf20Sopenharmony_ci            enable-method = "psci";
4668c2ecf20Sopenharmony_ci            cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
4678c2ecf20Sopenharmony_ci                   &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;
4688c2ecf20Sopenharmony_ci        };
4698c2ecf20Sopenharmony_ci
4708c2ecf20Sopenharmony_ci        cpu@100010101 {
4718c2ecf20Sopenharmony_ci            device_type = "cpu";
4728c2ecf20Sopenharmony_ci            compatible = "arm,cortex-a53";
4738c2ecf20Sopenharmony_ci            reg = <0x1 0x10101>;
4748c2ecf20Sopenharmony_ci            enable-method = "psci";
4758c2ecf20Sopenharmony_ci            cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
4768c2ecf20Sopenharmony_ci                   &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;
4778c2ecf20Sopenharmony_ci        };
4788c2ecf20Sopenharmony_ci
4798c2ecf20Sopenharmony_ci        idle-states {
4808c2ecf20Sopenharmony_ci            entry-method = "psci";
4818c2ecf20Sopenharmony_ci
4828c2ecf20Sopenharmony_ci            CPU_RETENTION_0_0: cpu-retention-0-0 {
4838c2ecf20Sopenharmony_ci                compatible = "arm,idle-state";
4848c2ecf20Sopenharmony_ci                arm,psci-suspend-param = <0x0010000>;
4858c2ecf20Sopenharmony_ci                entry-latency-us = <20>;
4868c2ecf20Sopenharmony_ci                exit-latency-us = <40>;
4878c2ecf20Sopenharmony_ci                min-residency-us = <80>;
4888c2ecf20Sopenharmony_ci            };
4898c2ecf20Sopenharmony_ci
4908c2ecf20Sopenharmony_ci            CLUSTER_RETENTION_0: cluster-retention-0 {
4918c2ecf20Sopenharmony_ci                compatible = "arm,idle-state";
4928c2ecf20Sopenharmony_ci                local-timer-stop;
4938c2ecf20Sopenharmony_ci                arm,psci-suspend-param = <0x1010000>;
4948c2ecf20Sopenharmony_ci                entry-latency-us = <50>;
4958c2ecf20Sopenharmony_ci                exit-latency-us = <100>;
4968c2ecf20Sopenharmony_ci                min-residency-us = <250>;
4978c2ecf20Sopenharmony_ci                wakeup-latency-us = <130>;
4988c2ecf20Sopenharmony_ci            };
4998c2ecf20Sopenharmony_ci
5008c2ecf20Sopenharmony_ci            CPU_SLEEP_0_0: cpu-sleep-0-0 {
5018c2ecf20Sopenharmony_ci                compatible = "arm,idle-state";
5028c2ecf20Sopenharmony_ci                local-timer-stop;
5038c2ecf20Sopenharmony_ci                arm,psci-suspend-param = <0x0010000>;
5048c2ecf20Sopenharmony_ci                entry-latency-us = <250>;
5058c2ecf20Sopenharmony_ci                exit-latency-us = <500>;
5068c2ecf20Sopenharmony_ci                min-residency-us = <950>;
5078c2ecf20Sopenharmony_ci            };
5088c2ecf20Sopenharmony_ci
5098c2ecf20Sopenharmony_ci            CLUSTER_SLEEP_0: cluster-sleep-0 {
5108c2ecf20Sopenharmony_ci                compatible = "arm,idle-state";
5118c2ecf20Sopenharmony_ci                local-timer-stop;
5128c2ecf20Sopenharmony_ci                arm,psci-suspend-param = <0x1010000>;
5138c2ecf20Sopenharmony_ci                entry-latency-us = <600>;
5148c2ecf20Sopenharmony_ci                exit-latency-us = <1100>;
5158c2ecf20Sopenharmony_ci                min-residency-us = <2700>;
5168c2ecf20Sopenharmony_ci                wakeup-latency-us = <1500>;
5178c2ecf20Sopenharmony_ci            };
5188c2ecf20Sopenharmony_ci
5198c2ecf20Sopenharmony_ci            CPU_RETENTION_1_0: cpu-retention-1-0 {
5208c2ecf20Sopenharmony_ci                compatible = "arm,idle-state";
5218c2ecf20Sopenharmony_ci                arm,psci-suspend-param = <0x0010000>;
5228c2ecf20Sopenharmony_ci                entry-latency-us = <20>;
5238c2ecf20Sopenharmony_ci                exit-latency-us = <40>;
5248c2ecf20Sopenharmony_ci                min-residency-us = <90>;
5258c2ecf20Sopenharmony_ci            };
5268c2ecf20Sopenharmony_ci
5278c2ecf20Sopenharmony_ci            CLUSTER_RETENTION_1: cluster-retention-1 {
5288c2ecf20Sopenharmony_ci                compatible = "arm,idle-state";
5298c2ecf20Sopenharmony_ci                local-timer-stop;
5308c2ecf20Sopenharmony_ci                arm,psci-suspend-param = <0x1010000>;
5318c2ecf20Sopenharmony_ci                entry-latency-us = <50>;
5328c2ecf20Sopenharmony_ci                exit-latency-us = <100>;
5338c2ecf20Sopenharmony_ci                min-residency-us = <270>;
5348c2ecf20Sopenharmony_ci                wakeup-latency-us = <100>;
5358c2ecf20Sopenharmony_ci            };
5368c2ecf20Sopenharmony_ci
5378c2ecf20Sopenharmony_ci            CPU_SLEEP_1_0: cpu-sleep-1-0 {
5388c2ecf20Sopenharmony_ci                compatible = "arm,idle-state";
5398c2ecf20Sopenharmony_ci                local-timer-stop;
5408c2ecf20Sopenharmony_ci                arm,psci-suspend-param = <0x0010000>;
5418c2ecf20Sopenharmony_ci                entry-latency-us = <70>;
5428c2ecf20Sopenharmony_ci                exit-latency-us = <100>;
5438c2ecf20Sopenharmony_ci                min-residency-us = <300>;
5448c2ecf20Sopenharmony_ci                wakeup-latency-us = <150>;
5458c2ecf20Sopenharmony_ci            };
5468c2ecf20Sopenharmony_ci
5478c2ecf20Sopenharmony_ci            CLUSTER_SLEEP_1: cluster-sleep-1 {
5488c2ecf20Sopenharmony_ci                compatible = "arm,idle-state";
5498c2ecf20Sopenharmony_ci                local-timer-stop;
5508c2ecf20Sopenharmony_ci                arm,psci-suspend-param = <0x1010000>;
5518c2ecf20Sopenharmony_ci                entry-latency-us = <500>;
5528c2ecf20Sopenharmony_ci                exit-latency-us = <1200>;
5538c2ecf20Sopenharmony_ci                min-residency-us = <3500>;
5548c2ecf20Sopenharmony_ci                wakeup-latency-us = <1300>;
5558c2ecf20Sopenharmony_ci            };
5568c2ecf20Sopenharmony_ci        };
5578c2ecf20Sopenharmony_ci    };
5588c2ecf20Sopenharmony_ci
5598c2ecf20Sopenharmony_ci  - |
5608c2ecf20Sopenharmony_ci    // Example 2 (ARM 32-bit, 8-cpu system, two clusters):
5618c2ecf20Sopenharmony_ci
5628c2ecf20Sopenharmony_ci    cpus {
5638c2ecf20Sopenharmony_ci        #size-cells = <0>;
5648c2ecf20Sopenharmony_ci        #address-cells = <1>;
5658c2ecf20Sopenharmony_ci
5668c2ecf20Sopenharmony_ci        cpu@0 {
5678c2ecf20Sopenharmony_ci            device_type = "cpu";
5688c2ecf20Sopenharmony_ci            compatible = "arm,cortex-a15";
5698c2ecf20Sopenharmony_ci            reg = <0x0>;
5708c2ecf20Sopenharmony_ci            cpu-idle-states = <&cpu_sleep_0_0 &cluster_sleep_0>;
5718c2ecf20Sopenharmony_ci        };
5728c2ecf20Sopenharmony_ci
5738c2ecf20Sopenharmony_ci        cpu@1 {
5748c2ecf20Sopenharmony_ci            device_type = "cpu";
5758c2ecf20Sopenharmony_ci            compatible = "arm,cortex-a15";
5768c2ecf20Sopenharmony_ci            reg = <0x1>;
5778c2ecf20Sopenharmony_ci            cpu-idle-states = <&cpu_sleep_0_0 &cluster_sleep_0>;
5788c2ecf20Sopenharmony_ci        };
5798c2ecf20Sopenharmony_ci
5808c2ecf20Sopenharmony_ci        cpu@2 {
5818c2ecf20Sopenharmony_ci            device_type = "cpu";
5828c2ecf20Sopenharmony_ci            compatible = "arm,cortex-a15";
5838c2ecf20Sopenharmony_ci            reg = <0x2>;
5848c2ecf20Sopenharmony_ci            cpu-idle-states = <&cpu_sleep_0_0 &cluster_sleep_0>;
5858c2ecf20Sopenharmony_ci        };
5868c2ecf20Sopenharmony_ci
5878c2ecf20Sopenharmony_ci        cpu@3 {
5888c2ecf20Sopenharmony_ci            device_type = "cpu";
5898c2ecf20Sopenharmony_ci            compatible = "arm,cortex-a15";
5908c2ecf20Sopenharmony_ci            reg = <0x3>;
5918c2ecf20Sopenharmony_ci            cpu-idle-states = <&cpu_sleep_0_0 &cluster_sleep_0>;
5928c2ecf20Sopenharmony_ci        };
5938c2ecf20Sopenharmony_ci
5948c2ecf20Sopenharmony_ci        cpu@100 {
5958c2ecf20Sopenharmony_ci            device_type = "cpu";
5968c2ecf20Sopenharmony_ci            compatible = "arm,cortex-a7";
5978c2ecf20Sopenharmony_ci            reg = <0x100>;
5988c2ecf20Sopenharmony_ci            cpu-idle-states = <&cpu_sleep_1_0 &cluster_sleep_1>;
5998c2ecf20Sopenharmony_ci        };
6008c2ecf20Sopenharmony_ci
6018c2ecf20Sopenharmony_ci        cpu@101 {
6028c2ecf20Sopenharmony_ci            device_type = "cpu";
6038c2ecf20Sopenharmony_ci            compatible = "arm,cortex-a7";
6048c2ecf20Sopenharmony_ci            reg = <0x101>;
6058c2ecf20Sopenharmony_ci            cpu-idle-states = <&cpu_sleep_1_0 &cluster_sleep_1>;
6068c2ecf20Sopenharmony_ci        };
6078c2ecf20Sopenharmony_ci
6088c2ecf20Sopenharmony_ci        cpu@102 {
6098c2ecf20Sopenharmony_ci            device_type = "cpu";
6108c2ecf20Sopenharmony_ci            compatible = "arm,cortex-a7";
6118c2ecf20Sopenharmony_ci            reg = <0x102>;
6128c2ecf20Sopenharmony_ci            cpu-idle-states = <&cpu_sleep_1_0 &cluster_sleep_1>;
6138c2ecf20Sopenharmony_ci        };
6148c2ecf20Sopenharmony_ci
6158c2ecf20Sopenharmony_ci        cpu@103 {
6168c2ecf20Sopenharmony_ci            device_type = "cpu";
6178c2ecf20Sopenharmony_ci            compatible = "arm,cortex-a7";
6188c2ecf20Sopenharmony_ci            reg = <0x103>;
6198c2ecf20Sopenharmony_ci            cpu-idle-states = <&cpu_sleep_1_0 &cluster_sleep_1>;
6208c2ecf20Sopenharmony_ci        };
6218c2ecf20Sopenharmony_ci
6228c2ecf20Sopenharmony_ci        idle-states {
6238c2ecf20Sopenharmony_ci            cpu_sleep_0_0: cpu-sleep-0-0 {
6248c2ecf20Sopenharmony_ci                compatible = "arm,idle-state";
6258c2ecf20Sopenharmony_ci                local-timer-stop;
6268c2ecf20Sopenharmony_ci                entry-latency-us = <200>;
6278c2ecf20Sopenharmony_ci                exit-latency-us = <100>;
6288c2ecf20Sopenharmony_ci                min-residency-us = <400>;
6298c2ecf20Sopenharmony_ci                wakeup-latency-us = <250>;
6308c2ecf20Sopenharmony_ci            };
6318c2ecf20Sopenharmony_ci
6328c2ecf20Sopenharmony_ci            cluster_sleep_0: cluster-sleep-0 {
6338c2ecf20Sopenharmony_ci                compatible = "arm,idle-state";
6348c2ecf20Sopenharmony_ci                local-timer-stop;
6358c2ecf20Sopenharmony_ci                entry-latency-us = <500>;
6368c2ecf20Sopenharmony_ci                exit-latency-us = <1500>;
6378c2ecf20Sopenharmony_ci                min-residency-us = <2500>;
6388c2ecf20Sopenharmony_ci                wakeup-latency-us = <1700>;
6398c2ecf20Sopenharmony_ci            };
6408c2ecf20Sopenharmony_ci
6418c2ecf20Sopenharmony_ci            cpu_sleep_1_0: cpu-sleep-1-0 {
6428c2ecf20Sopenharmony_ci                compatible = "arm,idle-state";
6438c2ecf20Sopenharmony_ci                local-timer-stop;
6448c2ecf20Sopenharmony_ci                entry-latency-us = <300>;
6458c2ecf20Sopenharmony_ci                exit-latency-us = <500>;
6468c2ecf20Sopenharmony_ci                min-residency-us = <900>;
6478c2ecf20Sopenharmony_ci                wakeup-latency-us = <600>;
6488c2ecf20Sopenharmony_ci            };
6498c2ecf20Sopenharmony_ci
6508c2ecf20Sopenharmony_ci            cluster_sleep_1: cluster-sleep-1 {
6518c2ecf20Sopenharmony_ci                compatible = "arm,idle-state";
6528c2ecf20Sopenharmony_ci                local-timer-stop;
6538c2ecf20Sopenharmony_ci                entry-latency-us = <800>;
6548c2ecf20Sopenharmony_ci                exit-latency-us = <2000>;
6558c2ecf20Sopenharmony_ci                min-residency-us = <6500>;
6568c2ecf20Sopenharmony_ci                wakeup-latency-us = <2300>;
6578c2ecf20Sopenharmony_ci            };
6588c2ecf20Sopenharmony_ci        };
6598c2ecf20Sopenharmony_ci    };
6608c2ecf20Sopenharmony_ci
6618c2ecf20Sopenharmony_ci...
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