18c2ecf20Sopenharmony_ci======================================================== 28c2ecf20Sopenharmony_ciSecondary CPU enable-method "al,alpine-smp" binding 38c2ecf20Sopenharmony_ci======================================================== 48c2ecf20Sopenharmony_ci 58c2ecf20Sopenharmony_ciThis document describes the "al,alpine-smp" method for 68c2ecf20Sopenharmony_cienabling secondary CPUs. To apply to all CPUs, a single 78c2ecf20Sopenharmony_ci"al,alpine-smp" enable method should be defined in the 88c2ecf20Sopenharmony_ci"cpus" node. 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ciEnable method name: "al,alpine-smp" 118c2ecf20Sopenharmony_ciCompatible machines: "al,alpine" 128c2ecf20Sopenharmony_ciCompatible CPUs: "arm,cortex-a15" 138c2ecf20Sopenharmony_ciRelated properties: (none) 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_ciNote: 168c2ecf20Sopenharmony_ciThis enable method requires valid nodes compatible with 178c2ecf20Sopenharmony_ci"al,alpine-cpu-resume" and "al,alpine-nb-service". 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ci* Alpine CPU resume registers 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ciThe CPU resume register are used to define required resume address after 238c2ecf20Sopenharmony_cireset. 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_ciProperties: 268c2ecf20Sopenharmony_ci- compatible : Should contain "al,alpine-cpu-resume". 278c2ecf20Sopenharmony_ci- reg : Offset and length of the register set for the device 288c2ecf20Sopenharmony_ci 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_ci* Alpine System-Fabric Service Registers 318c2ecf20Sopenharmony_ci 328c2ecf20Sopenharmony_ciThe System-Fabric Service Registers allow various operation on CPU and 338c2ecf20Sopenharmony_cisystem fabric, like powering CPUs off. 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_ciProperties: 368c2ecf20Sopenharmony_ci- compatible : Should contain "al,alpine-sysfabric-service" and "syscon". 378c2ecf20Sopenharmony_ci- reg : Offset and length of the register set for the device 388c2ecf20Sopenharmony_ci 398c2ecf20Sopenharmony_ci 408c2ecf20Sopenharmony_ciExample: 418c2ecf20Sopenharmony_ci 428c2ecf20Sopenharmony_cicpus { 438c2ecf20Sopenharmony_ci #address-cells = <1>; 448c2ecf20Sopenharmony_ci #size-cells = <0>; 458c2ecf20Sopenharmony_ci enable-method = "al,alpine-smp"; 468c2ecf20Sopenharmony_ci 478c2ecf20Sopenharmony_ci cpu@0 { 488c2ecf20Sopenharmony_ci compatible = "arm,cortex-a15"; 498c2ecf20Sopenharmony_ci device_type = "cpu"; 508c2ecf20Sopenharmony_ci reg = <0>; 518c2ecf20Sopenharmony_ci }; 528c2ecf20Sopenharmony_ci 538c2ecf20Sopenharmony_ci cpu@1 { 548c2ecf20Sopenharmony_ci compatible = "arm,cortex-a15"; 558c2ecf20Sopenharmony_ci device_type = "cpu"; 568c2ecf20Sopenharmony_ci reg = <1>; 578c2ecf20Sopenharmony_ci }; 588c2ecf20Sopenharmony_ci 598c2ecf20Sopenharmony_ci cpu@2 { 608c2ecf20Sopenharmony_ci compatible = "arm,cortex-a15"; 618c2ecf20Sopenharmony_ci device_type = "cpu"; 628c2ecf20Sopenharmony_ci reg = <2>; 638c2ecf20Sopenharmony_ci }; 648c2ecf20Sopenharmony_ci 658c2ecf20Sopenharmony_ci cpu@3 { 668c2ecf20Sopenharmony_ci compatible = "arm,cortex-a15"; 678c2ecf20Sopenharmony_ci device_type = "cpu"; 688c2ecf20Sopenharmony_ci reg = <3>; 698c2ecf20Sopenharmony_ci }; 708c2ecf20Sopenharmony_ci}; 718c2ecf20Sopenharmony_ci 728c2ecf20Sopenharmony_cicpu_resume { 738c2ecf20Sopenharmony_ci compatible = "al,alpine-cpu-resume"; 748c2ecf20Sopenharmony_ci reg = <0xfbff5ed0 0x30>; 758c2ecf20Sopenharmony_ci}; 768c2ecf20Sopenharmony_ci 778c2ecf20Sopenharmony_cinb_service { 788c2ecf20Sopenharmony_ci compatible = "al,alpine-sysfabric-service", "syscon"; 798c2ecf20Sopenharmony_ci reg = <0xfb070000 0x10000>; 808c2ecf20Sopenharmony_ci}; 81