18c2ecf20Sopenharmony_ciSystem Control and Power Interface (SCPI) Message Protocol 28c2ecf20Sopenharmony_ci---------------------------------------------------------- 38c2ecf20Sopenharmony_ci 48c2ecf20Sopenharmony_ciFirmware implementing the SCPI described in ARM document number ARM DUI 0922B 58c2ecf20Sopenharmony_ci("ARM Compute Subsystem SCP: Message Interface Protocols")[0] can be used 68c2ecf20Sopenharmony_ciby Linux to initiate various system control and power operations. 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ciRequired properties: 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ci- compatible : should be 118c2ecf20Sopenharmony_ci * "arm,scpi" : For implementations complying to SCPI v1.0 or above 128c2ecf20Sopenharmony_ci * "arm,scpi-pre-1.0" : For implementations complying to all 138c2ecf20Sopenharmony_ci unversioned releases prior to SCPI v1.0 148c2ecf20Sopenharmony_ci- mboxes: List of phandle and mailbox channel specifiers 158c2ecf20Sopenharmony_ci All the channels reserved by remote SCP firmware for use by 168c2ecf20Sopenharmony_ci SCPI message protocol should be specified in any order 178c2ecf20Sopenharmony_ci- shmem : List of phandle pointing to the shared memory(SHM) area between the 188c2ecf20Sopenharmony_ci processors using these mailboxes for IPC, one for each mailbox 198c2ecf20Sopenharmony_ci SHM can be any memory reserved for the purpose of this communication 208c2ecf20Sopenharmony_ci between the processors. 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ciSee Documentation/devicetree/bindings/mailbox/mailbox.txt 238c2ecf20Sopenharmony_cifor more details about the generic mailbox controller and 248c2ecf20Sopenharmony_ciclient driver bindings. 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_ciClock bindings for the clocks based on SCPI Message Protocol 278c2ecf20Sopenharmony_ci------------------------------------------------------------ 288c2ecf20Sopenharmony_ci 298c2ecf20Sopenharmony_ciThis binding uses the common clock binding[1]. 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ciContainer Node 328c2ecf20Sopenharmony_ci============== 338c2ecf20Sopenharmony_ciRequired properties: 348c2ecf20Sopenharmony_ci- compatible : should be "arm,scpi-clocks" 358c2ecf20Sopenharmony_ci All the clocks provided by SCP firmware via SCPI message 368c2ecf20Sopenharmony_ci protocol much be listed as sub-nodes under this node. 378c2ecf20Sopenharmony_ci 388c2ecf20Sopenharmony_ciSub-nodes 398c2ecf20Sopenharmony_ci========= 408c2ecf20Sopenharmony_ciRequired properties: 418c2ecf20Sopenharmony_ci- compatible : shall include one of the following 428c2ecf20Sopenharmony_ci "arm,scpi-dvfs-clocks" - all the clocks that are variable and index based. 438c2ecf20Sopenharmony_ci These clocks don't provide an entire range of values between the 448c2ecf20Sopenharmony_ci limits but only discrete points within the range. The firmware 458c2ecf20Sopenharmony_ci provides the mapping for each such operating frequency and the 468c2ecf20Sopenharmony_ci index associated with it. The firmware also manages the 478c2ecf20Sopenharmony_ci voltage scaling appropriately with the clock scaling. 488c2ecf20Sopenharmony_ci "arm,scpi-variable-clocks" - all the clocks that are variable and provide full 498c2ecf20Sopenharmony_ci range within the specified range. The firmware provides the 508c2ecf20Sopenharmony_ci range of values within a specified range. 518c2ecf20Sopenharmony_ci 528c2ecf20Sopenharmony_ciOther required properties for all clocks(all from common clock binding): 538c2ecf20Sopenharmony_ci- #clock-cells : Should be 1. Contains the Clock ID value used by SCPI commands. 548c2ecf20Sopenharmony_ci- clock-output-names : shall be the corresponding names of the outputs. 558c2ecf20Sopenharmony_ci- clock-indices: The identifying number for the clocks(i.e.clock_id) in the 568c2ecf20Sopenharmony_ci node. It can be non linear and hence provide the mapping of identifiers 578c2ecf20Sopenharmony_ci into the clock-output-names array. 588c2ecf20Sopenharmony_ci 598c2ecf20Sopenharmony_ciSRAM and Shared Memory for SCPI 608c2ecf20Sopenharmony_ci------------------------------- 618c2ecf20Sopenharmony_ci 628c2ecf20Sopenharmony_ciA small area of SRAM is reserved for SCPI communication between application 638c2ecf20Sopenharmony_ciprocessors and SCP. 648c2ecf20Sopenharmony_ci 658c2ecf20Sopenharmony_ciThe properties should follow the generic mmio-sram description found in [3] 668c2ecf20Sopenharmony_ci 678c2ecf20Sopenharmony_ciEach sub-node represents the reserved area for SCPI. 688c2ecf20Sopenharmony_ci 698c2ecf20Sopenharmony_ciRequired sub-node properties: 708c2ecf20Sopenharmony_ci- reg : The base offset and size of the reserved area with the SRAM 718c2ecf20Sopenharmony_ci- compatible : should be "arm,scp-shmem" for Non-secure SRAM based 728c2ecf20Sopenharmony_ci shared memory 738c2ecf20Sopenharmony_ci 748c2ecf20Sopenharmony_ciSensor bindings for the sensors based on SCPI Message Protocol 758c2ecf20Sopenharmony_ci-------------------------------------------------------------- 768c2ecf20Sopenharmony_ciSCPI provides an API to access the various sensors on the SoC. 778c2ecf20Sopenharmony_ci 788c2ecf20Sopenharmony_ciRequired properties: 798c2ecf20Sopenharmony_ci- compatible : should be "arm,scpi-sensors". 808c2ecf20Sopenharmony_ci- #thermal-sensor-cells: should be set to 1. This property follows the 818c2ecf20Sopenharmony_ci thermal device tree bindings[2]. 828c2ecf20Sopenharmony_ci 838c2ecf20Sopenharmony_ci Valid cell values are raw identifiers (Sensor ID) 848c2ecf20Sopenharmony_ci as used by the firmware. Refer to platform details 858c2ecf20Sopenharmony_ci for your implementation for the IDs to use. 868c2ecf20Sopenharmony_ci 878c2ecf20Sopenharmony_ciPower domain bindings for the power domains based on SCPI Message Protocol 888c2ecf20Sopenharmony_ci------------------------------------------------------------ 898c2ecf20Sopenharmony_ci 908c2ecf20Sopenharmony_ciThis binding uses the generic power domain binding[4]. 918c2ecf20Sopenharmony_ci 928c2ecf20Sopenharmony_ciPM domain providers 938c2ecf20Sopenharmony_ci=================== 948c2ecf20Sopenharmony_ci 958c2ecf20Sopenharmony_ciRequired properties: 968c2ecf20Sopenharmony_ci - #power-domain-cells : Should be 1. Contains the device or the power 978c2ecf20Sopenharmony_ci domain ID value used by SCPI commands. 988c2ecf20Sopenharmony_ci - num-domains: Total number of power domains provided by SCPI. This is 998c2ecf20Sopenharmony_ci needed as the SCPI message protocol lacks a mechanism to 1008c2ecf20Sopenharmony_ci query this information at runtime. 1018c2ecf20Sopenharmony_ci 1028c2ecf20Sopenharmony_ciPM domain consumers 1038c2ecf20Sopenharmony_ci=================== 1048c2ecf20Sopenharmony_ci 1058c2ecf20Sopenharmony_ciRequired properties: 1068c2ecf20Sopenharmony_ci - power-domains : A phandle and PM domain specifier as defined by bindings of 1078c2ecf20Sopenharmony_ci the power controller specified by phandle. 1088c2ecf20Sopenharmony_ci 1098c2ecf20Sopenharmony_ci[0] http://infocenter.arm.com/help/topic/com.arm.doc.dui0922b/index.html 1108c2ecf20Sopenharmony_ci[1] Documentation/devicetree/bindings/clock/clock-bindings.txt 1118c2ecf20Sopenharmony_ci[2] Documentation/devicetree/bindings/thermal/thermal*.yaml 1128c2ecf20Sopenharmony_ci[3] Documentation/devicetree/bindings/sram/sram.yaml 1138c2ecf20Sopenharmony_ci[4] Documentation/devicetree/bindings/power/power-domain.yaml 1148c2ecf20Sopenharmony_ci 1158c2ecf20Sopenharmony_ciExample: 1168c2ecf20Sopenharmony_ci 1178c2ecf20Sopenharmony_cisram: sram@50000000 { 1188c2ecf20Sopenharmony_ci compatible = "arm,juno-sram-ns", "mmio-sram"; 1198c2ecf20Sopenharmony_ci reg = <0x0 0x50000000 0x0 0x10000>; 1208c2ecf20Sopenharmony_ci 1218c2ecf20Sopenharmony_ci #address-cells = <1>; 1228c2ecf20Sopenharmony_ci #size-cells = <1>; 1238c2ecf20Sopenharmony_ci ranges = <0 0x0 0x50000000 0x10000>; 1248c2ecf20Sopenharmony_ci 1258c2ecf20Sopenharmony_ci cpu_scp_lpri: scp-shmem@0 { 1268c2ecf20Sopenharmony_ci compatible = "arm,juno-scp-shmem"; 1278c2ecf20Sopenharmony_ci reg = <0x0 0x200>; 1288c2ecf20Sopenharmony_ci }; 1298c2ecf20Sopenharmony_ci 1308c2ecf20Sopenharmony_ci cpu_scp_hpri: scp-shmem@200 { 1318c2ecf20Sopenharmony_ci compatible = "arm,juno-scp-shmem"; 1328c2ecf20Sopenharmony_ci reg = <0x200 0x200>; 1338c2ecf20Sopenharmony_ci }; 1348c2ecf20Sopenharmony_ci}; 1358c2ecf20Sopenharmony_ci 1368c2ecf20Sopenharmony_cimailbox: mailbox0@40000000 { 1378c2ecf20Sopenharmony_ci .... 1388c2ecf20Sopenharmony_ci #mbox-cells = <1>; 1398c2ecf20Sopenharmony_ci}; 1408c2ecf20Sopenharmony_ci 1418c2ecf20Sopenharmony_ciscpi_protocol: scpi@2e000000 { 1428c2ecf20Sopenharmony_ci compatible = "arm,scpi"; 1438c2ecf20Sopenharmony_ci mboxes = <&mailbox 0 &mailbox 1>; 1448c2ecf20Sopenharmony_ci shmem = <&cpu_scp_lpri &cpu_scp_hpri>; 1458c2ecf20Sopenharmony_ci 1468c2ecf20Sopenharmony_ci clocks { 1478c2ecf20Sopenharmony_ci compatible = "arm,scpi-clocks"; 1488c2ecf20Sopenharmony_ci 1498c2ecf20Sopenharmony_ci scpi_dvfs: scpi_clocks@0 { 1508c2ecf20Sopenharmony_ci compatible = "arm,scpi-dvfs-clocks"; 1518c2ecf20Sopenharmony_ci #clock-cells = <1>; 1528c2ecf20Sopenharmony_ci clock-indices = <0>, <1>, <2>; 1538c2ecf20Sopenharmony_ci clock-output-names = "atlclk", "aplclk","gpuclk"; 1548c2ecf20Sopenharmony_ci }; 1558c2ecf20Sopenharmony_ci scpi_clk: scpi_clocks@3 { 1568c2ecf20Sopenharmony_ci compatible = "arm,scpi-variable-clocks"; 1578c2ecf20Sopenharmony_ci #clock-cells = <1>; 1588c2ecf20Sopenharmony_ci clock-indices = <3>, <4>; 1598c2ecf20Sopenharmony_ci clock-output-names = "pxlclk0", "pxlclk1"; 1608c2ecf20Sopenharmony_ci }; 1618c2ecf20Sopenharmony_ci }; 1628c2ecf20Sopenharmony_ci 1638c2ecf20Sopenharmony_ci scpi_sensors0: sensors { 1648c2ecf20Sopenharmony_ci compatible = "arm,scpi-sensors"; 1658c2ecf20Sopenharmony_ci #thermal-sensor-cells = <1>; 1668c2ecf20Sopenharmony_ci }; 1678c2ecf20Sopenharmony_ci 1688c2ecf20Sopenharmony_ci scpi_devpd: scpi-power-domains { 1698c2ecf20Sopenharmony_ci compatible = "arm,scpi-power-domains"; 1708c2ecf20Sopenharmony_ci num-domains = <2>; 1718c2ecf20Sopenharmony_ci #power-domain-cells = <1>; 1728c2ecf20Sopenharmony_ci }; 1738c2ecf20Sopenharmony_ci}; 1748c2ecf20Sopenharmony_ci 1758c2ecf20Sopenharmony_cicpu@0 { 1768c2ecf20Sopenharmony_ci ... 1778c2ecf20Sopenharmony_ci reg = <0 0>; 1788c2ecf20Sopenharmony_ci clocks = <&scpi_dvfs 0>; 1798c2ecf20Sopenharmony_ci}; 1808c2ecf20Sopenharmony_ci 1818c2ecf20Sopenharmony_cihdlcd@7ff60000 { 1828c2ecf20Sopenharmony_ci ... 1838c2ecf20Sopenharmony_ci reg = <0 0x7ff60000 0 0x1000>; 1848c2ecf20Sopenharmony_ci clocks = <&scpi_clk 4>; 1858c2ecf20Sopenharmony_ci power-domains = <&scpi_devpd 1>; 1868c2ecf20Sopenharmony_ci}; 1878c2ecf20Sopenharmony_ci 1888c2ecf20Sopenharmony_cithermal-zones { 1898c2ecf20Sopenharmony_ci soc_thermal { 1908c2ecf20Sopenharmony_ci polling-delay-passive = <100>; 1918c2ecf20Sopenharmony_ci polling-delay = <1000>; 1928c2ecf20Sopenharmony_ci 1938c2ecf20Sopenharmony_ci /* sensor ID */ 1948c2ecf20Sopenharmony_ci thermal-sensors = <&scpi_sensors0 3>; 1958c2ecf20Sopenharmony_ci ... 1968c2ecf20Sopenharmony_ci }; 1978c2ecf20Sopenharmony_ci}; 1988c2ecf20Sopenharmony_ci 1998c2ecf20Sopenharmony_ciIn the above example, the #clock-cells is set to 1 as required. 2008c2ecf20Sopenharmony_ciscpi_dvfs has 3 output clocks namely: atlclk, aplclk, and gpuclk with 0, 2018c2ecf20Sopenharmony_ci1 and 2 as clock-indices. scpi_clk has 2 output clocks namely: pxlclk0 2028c2ecf20Sopenharmony_ciand pxlclk1 with 3 and 4 as clock-indices. 2038c2ecf20Sopenharmony_ci 2048c2ecf20Sopenharmony_ciThe first consumer in the example is cpu@0 and it has '0' as the clock 2058c2ecf20Sopenharmony_cispecifier which points to the first entry in the output clocks of 2068c2ecf20Sopenharmony_ciscpi_dvfs i.e. "atlclk". 2078c2ecf20Sopenharmony_ci 2088c2ecf20Sopenharmony_ciSimilarly the second example is hdlcd@7ff60000 and it has pxlclk1 as input 2098c2ecf20Sopenharmony_ciclock. '4' in the clock specifier here points to the second entry 2108c2ecf20Sopenharmony_ciin the output clocks of scpi_clocks i.e. "pxlclk1" 2118c2ecf20Sopenharmony_ci 2128c2ecf20Sopenharmony_ciThe thermal-sensors property in the soc_thermal node uses the 2138c2ecf20Sopenharmony_citemperature sensor provided by SCP firmware to setup a thermal 2148c2ecf20Sopenharmony_cizone. The ID "3" is the sensor identifier for the temperature sensor 2158c2ecf20Sopenharmony_cias used by the firmware. 2168c2ecf20Sopenharmony_ci 2178c2ecf20Sopenharmony_ciThe num-domains property in scpi-power-domains domain specifies that 2188c2ecf20Sopenharmony_ciSCPI provides 2 power domains. The hdlcd node uses the power domain with 2198c2ecf20Sopenharmony_cidomain ID 1. 220