18c2ecf20Sopenharmony_ciAPM X-GENE SoC series SCU Registers
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ciThis system clock unit contain various register that control block resets,
48c2ecf20Sopenharmony_ciclock enable/disables, clock divisors and other deepsleep registers.
58c2ecf20Sopenharmony_ci
68c2ecf20Sopenharmony_ciProperties:
78c2ecf20Sopenharmony_ci - compatible : should contain two values. First value must be:
88c2ecf20Sopenharmony_ci		   - "apm,xgene-scu"
98c2ecf20Sopenharmony_ci		second value must be always "syscon".
108c2ecf20Sopenharmony_ci
118c2ecf20Sopenharmony_ci - reg : offset and length of the register set.
128c2ecf20Sopenharmony_ci
138c2ecf20Sopenharmony_ciExample :
148c2ecf20Sopenharmony_ci	scu: system-clk-controller@17000000 {
158c2ecf20Sopenharmony_ci		compatible = "apm,xgene-scu","syscon";
168c2ecf20Sopenharmony_ci		reg = <0x0 0x17000000 0x0 0x400>;
178c2ecf20Sopenharmony_ci	};
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