18c2ecf20Sopenharmony_ci======================= 28c2ecf20Sopenharmony_ciS3C24XX Suspend Support 38c2ecf20Sopenharmony_ci======================= 48c2ecf20Sopenharmony_ci 58c2ecf20Sopenharmony_ci 68c2ecf20Sopenharmony_ciIntroduction 78c2ecf20Sopenharmony_ci------------ 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_ci The S3C24XX supports a low-power suspend mode, where the SDRAM is kept 108c2ecf20Sopenharmony_ci in Self-Refresh mode, and all but the essential peripheral blocks are 118c2ecf20Sopenharmony_ci powered down. For more information on how this works, please look 128c2ecf20Sopenharmony_ci at the relevant CPU datasheet from Samsung. 138c2ecf20Sopenharmony_ci 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_ciRequirements 168c2ecf20Sopenharmony_ci------------ 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_ci 1) A bootloader that can support the necessary resume operation 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ci 2) Support for at least 1 source for resume 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ci 3) CONFIG_PM enabled in the kernel 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci 4) Any peripherals that are going to be powered down at the same 258c2ecf20Sopenharmony_ci time require suspend/resume support. 268c2ecf20Sopenharmony_ci 278c2ecf20Sopenharmony_ci 288c2ecf20Sopenharmony_ciResuming 298c2ecf20Sopenharmony_ci-------- 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ci The S3C2410 user manual defines the process of sending the CPU to 328c2ecf20Sopenharmony_ci sleep and how it resumes. The default behaviour of the Linux code 338c2ecf20Sopenharmony_ci is to set the GSTATUS3 register to the physical address of the 348c2ecf20Sopenharmony_ci code to resume Linux operation. 358c2ecf20Sopenharmony_ci 368c2ecf20Sopenharmony_ci GSTATUS4 is currently left alone by the sleep code, and is free to 378c2ecf20Sopenharmony_ci use for any other purposes (for example, the EB2410ITX uses this to 388c2ecf20Sopenharmony_ci save memory configuration in). 398c2ecf20Sopenharmony_ci 408c2ecf20Sopenharmony_ci 418c2ecf20Sopenharmony_ciMachine Support 428c2ecf20Sopenharmony_ci--------------- 438c2ecf20Sopenharmony_ci 448c2ecf20Sopenharmony_ci The machine specific functions must call the s3c_pm_init() function 458c2ecf20Sopenharmony_ci to say that its bootloader is capable of resuming. This can be as 468c2ecf20Sopenharmony_ci simple as adding the following to the machine's definition: 478c2ecf20Sopenharmony_ci 488c2ecf20Sopenharmony_ci INITMACHINE(s3c_pm_init) 498c2ecf20Sopenharmony_ci 508c2ecf20Sopenharmony_ci A board can do its own setup before calling s3c_pm_init, if it 518c2ecf20Sopenharmony_ci needs to setup anything else for power management support. 528c2ecf20Sopenharmony_ci 538c2ecf20Sopenharmony_ci There is currently no support for over-riding the default method of 548c2ecf20Sopenharmony_ci saving the resume address, if your board requires it, then contact 558c2ecf20Sopenharmony_ci the maintainer and discuss what is required. 568c2ecf20Sopenharmony_ci 578c2ecf20Sopenharmony_ci Note, the original method of adding an late_initcall() is wrong, 588c2ecf20Sopenharmony_ci and will end up initialising all compiled machines' pm init! 598c2ecf20Sopenharmony_ci 608c2ecf20Sopenharmony_ci The following is an example of code used for testing wakeup from 618c2ecf20Sopenharmony_ci an falling edge on IRQ_EINT0:: 628c2ecf20Sopenharmony_ci 638c2ecf20Sopenharmony_ci 648c2ecf20Sopenharmony_ci static irqreturn_t button_irq(int irq, void *pw) 658c2ecf20Sopenharmony_ci { 668c2ecf20Sopenharmony_ci return IRQ_HANDLED; 678c2ecf20Sopenharmony_ci } 688c2ecf20Sopenharmony_ci 698c2ecf20Sopenharmony_ci statuc void __init machine_init(void) 708c2ecf20Sopenharmony_ci { 718c2ecf20Sopenharmony_ci ... 728c2ecf20Sopenharmony_ci 738c2ecf20Sopenharmony_ci request_irq(IRQ_EINT0, button_irq, IRQF_TRIGGER_FALLING, 748c2ecf20Sopenharmony_ci "button-irq-eint0", NULL); 758c2ecf20Sopenharmony_ci 768c2ecf20Sopenharmony_ci enable_irq_wake(IRQ_EINT0); 778c2ecf20Sopenharmony_ci 788c2ecf20Sopenharmony_ci s3c_pm_init(); 798c2ecf20Sopenharmony_ci } 808c2ecf20Sopenharmony_ci 818c2ecf20Sopenharmony_ci 828c2ecf20Sopenharmony_ciDebugging 838c2ecf20Sopenharmony_ci--------- 848c2ecf20Sopenharmony_ci 858c2ecf20Sopenharmony_ci There are several important things to remember when using PM suspend: 868c2ecf20Sopenharmony_ci 878c2ecf20Sopenharmony_ci 1) The uart drivers will disable the clocks to the UART blocks when 888c2ecf20Sopenharmony_ci suspending, which means that use of printascii() or similar direct 898c2ecf20Sopenharmony_ci access to the UARTs will cause the debug to stop. 908c2ecf20Sopenharmony_ci 918c2ecf20Sopenharmony_ci 2) While the pm code itself will attempt to re-enable the UART clocks, 928c2ecf20Sopenharmony_ci care should be taken that any external clock sources that the UARTs 938c2ecf20Sopenharmony_ci rely on are still enabled at that point. 948c2ecf20Sopenharmony_ci 958c2ecf20Sopenharmony_ci 3) If any debugging is placed in the resume path, then it must have the 968c2ecf20Sopenharmony_ci relevant clocks and peripherals setup before use (ie, bootloader). 978c2ecf20Sopenharmony_ci 988c2ecf20Sopenharmony_ci For example, if you transmit a character from the UART, the baud 998c2ecf20Sopenharmony_ci rate and uart controls must be setup beforehand. 1008c2ecf20Sopenharmony_ci 1018c2ecf20Sopenharmony_ci 1028c2ecf20Sopenharmony_ciConfiguration 1038c2ecf20Sopenharmony_ci------------- 1048c2ecf20Sopenharmony_ci 1058c2ecf20Sopenharmony_ci The S3C2410 specific configuration in `System Type` defines various 1068c2ecf20Sopenharmony_ci aspects of how the S3C2410 suspend and resume support is configured 1078c2ecf20Sopenharmony_ci 1088c2ecf20Sopenharmony_ci `S3C2410 PM Suspend debug` 1098c2ecf20Sopenharmony_ci 1108c2ecf20Sopenharmony_ci This option prints messages to the serial console before and after 1118c2ecf20Sopenharmony_ci the actual suspend, giving detailed information on what is 1128c2ecf20Sopenharmony_ci happening 1138c2ecf20Sopenharmony_ci 1148c2ecf20Sopenharmony_ci 1158c2ecf20Sopenharmony_ci `S3C2410 PM Suspend Memory CRC` 1168c2ecf20Sopenharmony_ci 1178c2ecf20Sopenharmony_ci Allows the entire memory to be checksummed before and after the 1188c2ecf20Sopenharmony_ci suspend to see if there has been any corruption of the contents. 1198c2ecf20Sopenharmony_ci 1208c2ecf20Sopenharmony_ci Note, the time to calculate the CRC is dependent on the CPU speed 1218c2ecf20Sopenharmony_ci and the size of memory. For an 64Mbyte RAM area on an 200MHz 1228c2ecf20Sopenharmony_ci S3C2410, this can take approximately 4 seconds to complete. 1238c2ecf20Sopenharmony_ci 1248c2ecf20Sopenharmony_ci This support requires the CRC32 function to be enabled. 1258c2ecf20Sopenharmony_ci 1268c2ecf20Sopenharmony_ci 1278c2ecf20Sopenharmony_ci `S3C2410 PM Suspend CRC Chunksize (KiB)` 1288c2ecf20Sopenharmony_ci 1298c2ecf20Sopenharmony_ci Defines the size of memory each CRC chunk covers. A smaller value 1308c2ecf20Sopenharmony_ci will mean that the CRC data block will take more memory, but will 1318c2ecf20Sopenharmony_ci identify any faults with better precision 1328c2ecf20Sopenharmony_ci 1338c2ecf20Sopenharmony_ci 1348c2ecf20Sopenharmony_ciDocument Author 1358c2ecf20Sopenharmony_ci--------------- 1368c2ecf20Sopenharmony_ci 1378c2ecf20Sopenharmony_ciBen Dooks, Copyright 2004 Simtec Electronics 138