18c2ecf20Sopenharmony_ci==================== 28c2ecf20Sopenharmony_ciS3C24XX GPIO Control 38c2ecf20Sopenharmony_ci==================== 48c2ecf20Sopenharmony_ci 58c2ecf20Sopenharmony_ciIntroduction 68c2ecf20Sopenharmony_ci------------ 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ci The s3c2410 kernel provides an interface to configure and 98c2ecf20Sopenharmony_ci manipulate the state of the GPIO pins, and find out other 108c2ecf20Sopenharmony_ci information about them. 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_ci There are a number of conditions attached to the configuration 138c2ecf20Sopenharmony_ci of the s3c2410 GPIO system, please read the Samsung provided 148c2ecf20Sopenharmony_ci data-sheet/users manual to find out the complete list. 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_ci See Documentation/arm/samsung/gpio.rst for the core implementation. 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ciGPIOLIB 208c2ecf20Sopenharmony_ci------- 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ci With the event of the GPIOLIB in drivers/gpio, support for some 238c2ecf20Sopenharmony_ci of the GPIO functions such as reading and writing a pin will 248c2ecf20Sopenharmony_ci be removed in favour of this common access method. 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_ci Once all the extant drivers have been converted, the functions 278c2ecf20Sopenharmony_ci listed below will be removed (they may be marked as __deprecated 288c2ecf20Sopenharmony_ci in the near future). 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_ci The following functions now either have a `s3c_` specific variant 318c2ecf20Sopenharmony_ci or are merged into gpiolib. See the definitions in 328c2ecf20Sopenharmony_ci arch/arm/plat-samsung/include/plat/gpio-cfg.h: 338c2ecf20Sopenharmony_ci 348c2ecf20Sopenharmony_ci - s3c2410_gpio_setpin() gpio_set_value() or gpio_direction_output() 358c2ecf20Sopenharmony_ci - s3c2410_gpio_getpin() gpio_get_value() or gpio_direction_input() 368c2ecf20Sopenharmony_ci - s3c2410_gpio_getirq() gpio_to_irq() 378c2ecf20Sopenharmony_ci - s3c2410_gpio_cfgpin() s3c_gpio_cfgpin() 388c2ecf20Sopenharmony_ci - s3c2410_gpio_getcfg() s3c_gpio_getcfg() 398c2ecf20Sopenharmony_ci - s3c2410_gpio_pullup() s3c_gpio_setpull() 408c2ecf20Sopenharmony_ci 418c2ecf20Sopenharmony_ci 428c2ecf20Sopenharmony_ciGPIOLIB conversion 438c2ecf20Sopenharmony_ci------------------ 448c2ecf20Sopenharmony_ci 458c2ecf20Sopenharmony_ciIf you need to convert your board or driver to use gpiolib from the phased 468c2ecf20Sopenharmony_ciout s3c2410 API, then here are some notes on the process. 478c2ecf20Sopenharmony_ci 488c2ecf20Sopenharmony_ci1) If your board is exclusively using an GPIO, say to control peripheral 498c2ecf20Sopenharmony_ci power, then it will require to claim the gpio with gpio_request() before 508c2ecf20Sopenharmony_ci it can use it. 518c2ecf20Sopenharmony_ci 528c2ecf20Sopenharmony_ci It is recommended to check the return value, with at least WARN_ON() 538c2ecf20Sopenharmony_ci during initialisation. 548c2ecf20Sopenharmony_ci 558c2ecf20Sopenharmony_ci2) The s3c2410_gpio_cfgpin() can be directly replaced with s3c_gpio_cfgpin() 568c2ecf20Sopenharmony_ci as they have the same arguments, and can either take the pin specific 578c2ecf20Sopenharmony_ci values, or the more generic special-function-number arguments. 588c2ecf20Sopenharmony_ci 598c2ecf20Sopenharmony_ci3) s3c2410_gpio_pullup() changes have the problem that while the 608c2ecf20Sopenharmony_ci s3c2410_gpio_pullup(x, 1) can be easily translated to the 618c2ecf20Sopenharmony_ci s3c_gpio_setpull(x, S3C_GPIO_PULL_NONE), the s3c2410_gpio_pullup(x, 0) 628c2ecf20Sopenharmony_ci are not so easy. 638c2ecf20Sopenharmony_ci 648c2ecf20Sopenharmony_ci The s3c2410_gpio_pullup(x, 0) case enables the pull-up (or in the case 658c2ecf20Sopenharmony_ci of some of the devices, a pull-down) and as such the new API distinguishes 668c2ecf20Sopenharmony_ci between the UP and DOWN case. There is currently no 'just turn on' setting 678c2ecf20Sopenharmony_ci which may be required if this becomes a problem. 688c2ecf20Sopenharmony_ci 698c2ecf20Sopenharmony_ci4) s3c2410_gpio_setpin() can be replaced by gpio_set_value(), the old call 708c2ecf20Sopenharmony_ci does not implicitly configure the relevant gpio to output. The gpio 718c2ecf20Sopenharmony_ci direction should be changed before using gpio_set_value(). 728c2ecf20Sopenharmony_ci 738c2ecf20Sopenharmony_ci5) s3c2410_gpio_getpin() is replaceable by gpio_get_value() if the pin 748c2ecf20Sopenharmony_ci has been set to input. It is currently unknown what the behaviour is 758c2ecf20Sopenharmony_ci when using gpio_get_value() on an output pin (s3c2410_gpio_getpin 768c2ecf20Sopenharmony_ci would return the value the pin is supposed to be outputting). 778c2ecf20Sopenharmony_ci 788c2ecf20Sopenharmony_ci6) s3c2410_gpio_getirq() should be directly replaceable with the 798c2ecf20Sopenharmony_ci gpio_to_irq() call. 808c2ecf20Sopenharmony_ci 818c2ecf20Sopenharmony_ciThe s3c2410_gpio and `gpio_` calls have always operated on the same gpio 828c2ecf20Sopenharmony_cinumberspace, so there is no problem with converting the gpio numbering 838c2ecf20Sopenharmony_cibetween the calls. 848c2ecf20Sopenharmony_ci 858c2ecf20Sopenharmony_ci 868c2ecf20Sopenharmony_ciHeaders 878c2ecf20Sopenharmony_ci------- 888c2ecf20Sopenharmony_ci 898c2ecf20Sopenharmony_ci See arch/arm/mach-s3c24xx/include/mach/regs-gpio.h for the list 908c2ecf20Sopenharmony_ci of GPIO pins, and the configuration values for them. This 918c2ecf20Sopenharmony_ci is included by using #include <mach/regs-gpio.h> 928c2ecf20Sopenharmony_ci 938c2ecf20Sopenharmony_ci 948c2ecf20Sopenharmony_ciPIN Numbers 958c2ecf20Sopenharmony_ci----------- 968c2ecf20Sopenharmony_ci 978c2ecf20Sopenharmony_ci Each pin has an unique number associated with it in regs-gpio.h, 988c2ecf20Sopenharmony_ci e.g. S3C2410_GPA(0) or S3C2410_GPF(1). These defines are used to tell 998c2ecf20Sopenharmony_ci the GPIO functions which pin is to be used. 1008c2ecf20Sopenharmony_ci 1018c2ecf20Sopenharmony_ci With the conversion to gpiolib, there is no longer a direct conversion 1028c2ecf20Sopenharmony_ci from gpio pin number to register base address as in earlier kernels. This 1038c2ecf20Sopenharmony_ci is due to the number space required for newer SoCs where the later 1048c2ecf20Sopenharmony_ci GPIOs are not contiguous. 1058c2ecf20Sopenharmony_ci 1068c2ecf20Sopenharmony_ci 1078c2ecf20Sopenharmony_ciConfiguring a pin 1088c2ecf20Sopenharmony_ci----------------- 1098c2ecf20Sopenharmony_ci 1108c2ecf20Sopenharmony_ci The following function allows the configuration of a given pin to 1118c2ecf20Sopenharmony_ci be changed. 1128c2ecf20Sopenharmony_ci 1138c2ecf20Sopenharmony_ci void s3c_gpio_cfgpin(unsigned int pin, unsigned int function); 1148c2ecf20Sopenharmony_ci 1158c2ecf20Sopenharmony_ci e.g.: 1168c2ecf20Sopenharmony_ci 1178c2ecf20Sopenharmony_ci s3c_gpio_cfgpin(S3C2410_GPA(0), S3C_GPIO_SFN(1)); 1188c2ecf20Sopenharmony_ci s3c_gpio_cfgpin(S3C2410_GPE(8), S3C_GPIO_SFN(2)); 1198c2ecf20Sopenharmony_ci 1208c2ecf20Sopenharmony_ci which would turn GPA(0) into the lowest Address line A0, and set 1218c2ecf20Sopenharmony_ci GPE(8) to be connected to the SDIO/MMC controller's SDDAT1 line. 1228c2ecf20Sopenharmony_ci 1238c2ecf20Sopenharmony_ci 1248c2ecf20Sopenharmony_ciReading the current configuration 1258c2ecf20Sopenharmony_ci--------------------------------- 1268c2ecf20Sopenharmony_ci 1278c2ecf20Sopenharmony_ci The current configuration of a pin can be read by using standard 1288c2ecf20Sopenharmony_ci gpiolib function: 1298c2ecf20Sopenharmony_ci 1308c2ecf20Sopenharmony_ci s3c_gpio_getcfg(unsigned int pin); 1318c2ecf20Sopenharmony_ci 1328c2ecf20Sopenharmony_ci The return value will be from the same set of values which can be 1338c2ecf20Sopenharmony_ci passed to s3c_gpio_cfgpin(). 1348c2ecf20Sopenharmony_ci 1358c2ecf20Sopenharmony_ci 1368c2ecf20Sopenharmony_ciConfiguring a pull-up resistor 1378c2ecf20Sopenharmony_ci------------------------------ 1388c2ecf20Sopenharmony_ci 1398c2ecf20Sopenharmony_ci A large proportion of the GPIO pins on the S3C2410 can have weak 1408c2ecf20Sopenharmony_ci pull-up resistors enabled. This can be configured by the following 1418c2ecf20Sopenharmony_ci function: 1428c2ecf20Sopenharmony_ci 1438c2ecf20Sopenharmony_ci void s3c_gpio_setpull(unsigned int pin, unsigned int to); 1448c2ecf20Sopenharmony_ci 1458c2ecf20Sopenharmony_ci Where the to value is S3C_GPIO_PULL_NONE to set the pull-up off, 1468c2ecf20Sopenharmony_ci and S3C_GPIO_PULL_UP to enable the specified pull-up. Any other 1478c2ecf20Sopenharmony_ci values are currently undefined. 1488c2ecf20Sopenharmony_ci 1498c2ecf20Sopenharmony_ci 1508c2ecf20Sopenharmony_ciGetting and setting the state of a PIN 1518c2ecf20Sopenharmony_ci-------------------------------------- 1528c2ecf20Sopenharmony_ci 1538c2ecf20Sopenharmony_ci These calls are now implemented by the relevant gpiolib calls, convert 1548c2ecf20Sopenharmony_ci your board or driver to use gpiolib. 1558c2ecf20Sopenharmony_ci 1568c2ecf20Sopenharmony_ci 1578c2ecf20Sopenharmony_ciGetting the IRQ number associated with a PIN 1588c2ecf20Sopenharmony_ci-------------------------------------------- 1598c2ecf20Sopenharmony_ci 1608c2ecf20Sopenharmony_ci A standard gpiolib function can map the given pin number to an IRQ 1618c2ecf20Sopenharmony_ci number to pass to the IRQ system. 1628c2ecf20Sopenharmony_ci 1638c2ecf20Sopenharmony_ci int gpio_to_irq(unsigned int pin); 1648c2ecf20Sopenharmony_ci 1658c2ecf20Sopenharmony_ci Note, not all pins have an IRQ. 1668c2ecf20Sopenharmony_ci 1678c2ecf20Sopenharmony_ci 1688c2ecf20Sopenharmony_ciAuthor 1698c2ecf20Sopenharmony_ci------- 1708c2ecf20Sopenharmony_ci 1718c2ecf20Sopenharmony_ciBen Dooks, 03 October 2004 1728c2ecf20Sopenharmony_ciCopyright 2004 Ben Dooks, Simtec Electronics 173