18c2ecf20Sopenharmony_ci======================= 28c2ecf20Sopenharmony_ciS3C24XX CPUfreq support 38c2ecf20Sopenharmony_ci======================= 48c2ecf20Sopenharmony_ci 58c2ecf20Sopenharmony_ciIntroduction 68c2ecf20Sopenharmony_ci------------ 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ci The S3C24XX series support a number of power saving systems, such as 98c2ecf20Sopenharmony_ci the ability to change the core, memory and peripheral operating 108c2ecf20Sopenharmony_ci frequencies. The core control is exported via the CPUFreq driver 118c2ecf20Sopenharmony_ci which has a number of different manual or automatic controls over the 128c2ecf20Sopenharmony_ci rate the core is running at. 138c2ecf20Sopenharmony_ci 148c2ecf20Sopenharmony_ci There are two forms of the driver depending on the specific CPU and 158c2ecf20Sopenharmony_ci how the clocks are arranged. The first implementation used as single 168c2ecf20Sopenharmony_ci PLL to feed the ARM, memory and peripherals via a series of dividers 178c2ecf20Sopenharmony_ci and muxes and this is the implementation that is documented here. A 188c2ecf20Sopenharmony_ci newer version where there is a separate PLL and clock divider for the 198c2ecf20Sopenharmony_ci ARM core is available as a separate driver. 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ciLayout 238c2ecf20Sopenharmony_ci------ 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_ci The code core manages the CPU specific drivers, any data that they 268c2ecf20Sopenharmony_ci need to register and the interface to the generic drivers/cpufreq 278c2ecf20Sopenharmony_ci system. Each CPU registers a driver to control the PLL, clock dividers 288c2ecf20Sopenharmony_ci and anything else associated with it. Any board that wants to use this 298c2ecf20Sopenharmony_ci framework needs to supply at least basic details of what is required. 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ci The core registers with drivers/cpufreq at init time if all the data 328c2ecf20Sopenharmony_ci necessary has been supplied. 338c2ecf20Sopenharmony_ci 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_ciCPU support 368c2ecf20Sopenharmony_ci----------- 378c2ecf20Sopenharmony_ci 388c2ecf20Sopenharmony_ci The support for each CPU depends on the facilities provided by the 398c2ecf20Sopenharmony_ci SoC and the driver as each device has different PLL and clock chains 408c2ecf20Sopenharmony_ci associated with it. 418c2ecf20Sopenharmony_ci 428c2ecf20Sopenharmony_ci 438c2ecf20Sopenharmony_ciSlow Mode 448c2ecf20Sopenharmony_ci--------- 458c2ecf20Sopenharmony_ci 468c2ecf20Sopenharmony_ci The SLOW mode where the PLL is turned off altogether and the 478c2ecf20Sopenharmony_ci system is fed by the external crystal input is currently not 488c2ecf20Sopenharmony_ci supported. 498c2ecf20Sopenharmony_ci 508c2ecf20Sopenharmony_ci 518c2ecf20Sopenharmony_cisysfs 528c2ecf20Sopenharmony_ci----- 538c2ecf20Sopenharmony_ci 548c2ecf20Sopenharmony_ci The core code exports extra information via sysfs in the directory 558c2ecf20Sopenharmony_ci devices/system/cpu/cpu0/arch-freq. 568c2ecf20Sopenharmony_ci 578c2ecf20Sopenharmony_ci 588c2ecf20Sopenharmony_ciBoard Support 598c2ecf20Sopenharmony_ci------------- 608c2ecf20Sopenharmony_ci 618c2ecf20Sopenharmony_ci Each board that wants to use the cpufreq code must register some basic 628c2ecf20Sopenharmony_ci information with the core driver to provide information about what the 638c2ecf20Sopenharmony_ci board requires and any restrictions being placed on it. 648c2ecf20Sopenharmony_ci 658c2ecf20Sopenharmony_ci The board needs to supply information about whether it needs the IO bank 668c2ecf20Sopenharmony_ci timings changing, any maximum frequency limits and information about the 678c2ecf20Sopenharmony_ci SDRAM refresh rate. 688c2ecf20Sopenharmony_ci 698c2ecf20Sopenharmony_ci 708c2ecf20Sopenharmony_ci 718c2ecf20Sopenharmony_ci 728c2ecf20Sopenharmony_ciDocument Author 738c2ecf20Sopenharmony_ci--------------- 748c2ecf20Sopenharmony_ci 758c2ecf20Sopenharmony_ciBen Dooks, Copyright 2009 Simtec Electronics 768c2ecf20Sopenharmony_ciLicensed under GPLv2 77