18c2ecf20Sopenharmony_ciWhat: /sys/class/fpga_manager/<fpga>/name 28c2ecf20Sopenharmony_ciDate: August 2015 38c2ecf20Sopenharmony_ciKernelVersion: 4.3 48c2ecf20Sopenharmony_ciContact: Alan Tull <atull@opensource.altera.com> 58c2ecf20Sopenharmony_ciDescription: Name of low level fpga manager driver. 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ciWhat: /sys/class/fpga_manager/<fpga>/state 88c2ecf20Sopenharmony_ciDate: August 2015 98c2ecf20Sopenharmony_ciKernelVersion: 4.3 108c2ecf20Sopenharmony_ciContact: Alan Tull <atull@opensource.altera.com> 118c2ecf20Sopenharmony_ciDescription: Read fpga manager state as a string. 128c2ecf20Sopenharmony_ci The intent is to provide enough detail that if something goes 138c2ecf20Sopenharmony_ci wrong during FPGA programming (something that the driver can't 148c2ecf20Sopenharmony_ci fix) then userspace can know, i.e. if the firmware request 158c2ecf20Sopenharmony_ci fails, that could be due to not being able to find the firmware 168c2ecf20Sopenharmony_ci file. 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_ci This is a superset of FPGA states and fpga manager driver 198c2ecf20Sopenharmony_ci states. The fpga manager driver is walking through these steps 208c2ecf20Sopenharmony_ci to get the FPGA into a known operating state. It's a sequence, 218c2ecf20Sopenharmony_ci though some steps may get skipped. Valid FPGA states will vary 228c2ecf20Sopenharmony_ci by manufacturer; this is a superset. 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci * unknown = can't determine state 258c2ecf20Sopenharmony_ci * power off = FPGA power is off 268c2ecf20Sopenharmony_ci * power up = FPGA reports power is up 278c2ecf20Sopenharmony_ci * reset = FPGA held in reset state 288c2ecf20Sopenharmony_ci * firmware request = firmware class request in progress 298c2ecf20Sopenharmony_ci * firmware request error = firmware request failed 308c2ecf20Sopenharmony_ci * write init = preparing FPGA for programming 318c2ecf20Sopenharmony_ci * write init error = Error while preparing FPGA for programming 328c2ecf20Sopenharmony_ci * write = FPGA ready to receive image data 338c2ecf20Sopenharmony_ci * write error = Error while programming 348c2ecf20Sopenharmony_ci * write complete = Doing post programming steps 358c2ecf20Sopenharmony_ci * write complete error = Error while doing post programming 368c2ecf20Sopenharmony_ci * operating = FPGA is programmed and operating 378c2ecf20Sopenharmony_ci 388c2ecf20Sopenharmony_ciWhat: /sys/class/fpga_manager/<fpga>/status 398c2ecf20Sopenharmony_ciDate: June 2018 408c2ecf20Sopenharmony_ciKernelVersion: 4.19 418c2ecf20Sopenharmony_ciContact: Wu Hao <hao.wu@intel.com> 428c2ecf20Sopenharmony_ciDescription: Read fpga manager status as a string. 438c2ecf20Sopenharmony_ci If FPGA programming operation fails, it could be caused by crc 448c2ecf20Sopenharmony_ci error or incompatible bitstream image. The intent of this 458c2ecf20Sopenharmony_ci interface is to provide more detailed information for FPGA 468c2ecf20Sopenharmony_ci programming errors to userspace. This is a list of strings for 478c2ecf20Sopenharmony_ci the supported status. 488c2ecf20Sopenharmony_ci 498c2ecf20Sopenharmony_ci * reconfig operation error - invalid operations detected by 508c2ecf20Sopenharmony_ci reconfiguration hardware. 518c2ecf20Sopenharmony_ci e.g. start reconfiguration 528c2ecf20Sopenharmony_ci with errors not cleared 538c2ecf20Sopenharmony_ci * reconfig CRC error - CRC error detected by 548c2ecf20Sopenharmony_ci reconfiguration hardware. 558c2ecf20Sopenharmony_ci * reconfig incompatible image - reconfiguration image is 568c2ecf20Sopenharmony_ci incompatible with hardware 578c2ecf20Sopenharmony_ci * reconfig IP protocol error - protocol errors detected by 588c2ecf20Sopenharmony_ci reconfiguration hardware 598c2ecf20Sopenharmony_ci * reconfig fifo overflow error - FIFO overflow detected by 608c2ecf20Sopenharmony_ci reconfiguration hardware 61