1/*
2 * Copyright (c) 2020-2021 Huawei Device Co., Ltd.
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at
6 *
7 *     http://www.apache.org/licenses/LICENSE-2.0
8 *
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
14 */
15
16#ifndef SOFTBUS_ADAPTER_CPU_H
17#define SOFTBUS_ADAPTER_CPU_H
18
19#ifndef _WIN32
20#include <sched.h>
21#endif
22
23#ifdef __cplusplus
24#if __cplusplus
25extern "C" {
26#endif
27#endif
28
29#ifdef _WIN32
30#define BARRIER()
31#define MB() BARRIER()
32#define WMB() BARRIER()
33#define RMB() BARRIER()
34#elif defined(__ICCARM__) || defined(__x86_64__)
35#define MB()
36#define WMB()
37#define RMB()
38#elif defined __linux__ || defined __LITEOS__ || defined __APPLE__
39#define DSB() __asm__ volatile("dsb" ::: "memory")
40#ifdef __riscv
41#define DMB() __asm__ __volatile__ ("fence iorw,iorw" ::: "memory")
42#elif __aarch64__
43#define DMB() __asm__ volatile("DMB ISHLD" : : : "memory")
44#else
45#define DMB() __asm__ volatile("dmb" ::: "memory")
46#endif
47#define ISB() __asm__ volatile("isb" ::: "memory")
48#define BARRIER() __asm__ volatile("" ::: "memory")
49
50#define MB() DMB()
51#define WMB() DMB()
52#define RMB() DMB()
53#else
54#define MB()
55#define WMB()
56#define RMB()
57#endif
58
59#ifdef _WIN32
60#define SoftBusYieldCpu()
61#else
62#define SoftBusYieldCpu() sched_yield()
63#endif
64
65#ifdef __cplusplus
66#if __cplusplus
67}
68#endif /* __cplusplus */
69#endif /* __cplusplus */
70#endif // SOFTBUS_ADAPTER_CPU_H