1094332d3Sopenharmony_ci/* 2094332d3Sopenharmony_ci * Copyright (c) 2022 Chipsea Technologies (Shenzhen) Corp., Ltd. 3094332d3Sopenharmony_ci * 4094332d3Sopenharmony_ci * HDF is dual licensed: you can use it either under the terms of 5094332d3Sopenharmony_ci * the GPL, or the BSD license, at your option. 6094332d3Sopenharmony_ci * See the LICENSE file in the root of this repository for complete details. 7094332d3Sopenharmony_ci */ 8094332d3Sopenharmony_ci 9094332d3Sopenharmony_ci#ifndef MODEL_SENSOR_DRIVER_CHIPSET_PPG_PPG_CS1262_H 10094332d3Sopenharmony_ci#define MODEL_SENSOR_DRIVER_CHIPSET_PPG_PPG_CS1262_H 11094332d3Sopenharmony_ci 12094332d3Sopenharmony_ci#include "ppg_cs1262_spi.h" 13094332d3Sopenharmony_ci#include "hdf_device_desc.h" 14094332d3Sopenharmony_ci/****************************************** DEFINE ******************************************/ 15094332d3Sopenharmony_ci#ifdef __LITEOS__ 16094332d3Sopenharmony_ci#define HEART_REG_TAB "/etc/cs1262_default.bin" 17094332d3Sopenharmony_ci#else 18094332d3Sopenharmony_ci#define HEART_REG_TAB "/system/etc/ppgconfig/cs1262_default.bin" 19094332d3Sopenharmony_ci#endif 20094332d3Sopenharmony_ci#define CS1262_MAX_FIFO_READ_NUM 800 21094332d3Sopenharmony_ci#define CS1262_DEVICE_ID 0x1262 22094332d3Sopenharmony_ci#define CS1262_MODULE_VER 1 23094332d3Sopenharmony_ci/******************************************* ENUM ********************************************/ 24094332d3Sopenharmony_citypedef enum { 25094332d3Sopenharmony_ci CS1262_REG_LOCK = 0, 26094332d3Sopenharmony_ci CS1262_REG_UNLOCK, 27094332d3Sopenharmony_ci} Cs1262LockStatus; 28094332d3Sopenharmony_ci/***************************************** TYPEDEF ******************************************/ 29094332d3Sopenharmony_ci// tab regs num 30094332d3Sopenharmony_ci#define SYS_REGS_NUM 6 31094332d3Sopenharmony_ci#define TL_REGS_NUM 40 32094332d3Sopenharmony_ci#define TX_REGS_NUM 15 33094332d3Sopenharmony_ci#define RX_REGS_NUM 77 34094332d3Sopenharmony_ci#define TE_REGS_NUM 38 35094332d3Sopenharmony_ci#define WEAR_REGS_NUM 25 36094332d3Sopenharmony_ci#define FIFO_REGS_NUM 10 37094332d3Sopenharmony_ci#define FIFO_WRITE_OFFSET 1 38094332d3Sopenharmony_ci 39094332d3Sopenharmony_citypedef struct { 40094332d3Sopenharmony_ci uint16_t startMagic; 41094332d3Sopenharmony_ci uint16_t clock; 42094332d3Sopenharmony_ci uint16_t tlTab[TL_REGS_NUM]; 43094332d3Sopenharmony_ci uint16_t txTab[TX_REGS_NUM]; 44094332d3Sopenharmony_ci uint16_t rxTab[RX_REGS_NUM]; 45094332d3Sopenharmony_ci uint16_t teTab[TE_REGS_NUM]; 46094332d3Sopenharmony_ci uint16_t wearTab[WEAR_REGS_NUM]; 47094332d3Sopenharmony_ci uint16_t fifoTab[FIFO_REGS_NUM]; 48094332d3Sopenharmony_ci uint16_t checksum; 49094332d3Sopenharmony_ci} Cs1262RegConfigTab; 50094332d3Sopenharmony_ci 51094332d3Sopenharmony_cienum PpgMode { 52094332d3Sopenharmony_ci NONE_MODE = 0, 53094332d3Sopenharmony_ci DEFAULT_MODE, 54094332d3Sopenharmony_ci HEART_RATE_MODE = DEFAULT_MODE, 55094332d3Sopenharmony_ci REG_MODE_MAX, 56094332d3Sopenharmony_ci}; 57094332d3Sopenharmony_ci 58094332d3Sopenharmony_cistruct Cs1262DrvData { 59094332d3Sopenharmony_ci struct IDeviceIoService ioService; 60094332d3Sopenharmony_ci struct HdfDeviceObject *device; 61094332d3Sopenharmony_ci struct PpgCfgData *ppgCfg; 62094332d3Sopenharmony_ci enum PpgMode regMode; 63094332d3Sopenharmony_ci}; 64094332d3Sopenharmony_ci 65094332d3Sopenharmony_cistruct PpgModeTab { 66094332d3Sopenharmony_ci enum PpgMode mode; 67094332d3Sopenharmony_ci Cs1262RegConfigTab *regTab; 68094332d3Sopenharmony_ci}; 69094332d3Sopenharmony_ci 70094332d3Sopenharmony_ciint32_t Cs1262Loadfw(enum PpgMode mode, Cs1262RegConfigTab **configTab); 71094332d3Sopenharmony_ci 72094332d3Sopenharmony_ci#endif // MODEL_SENSOR_DRIVER_CHIPSET_PPG_PPG_CS1262_H 73