1e41f4b71Sopenharmony_ci# Clock
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3e41f4b71Sopenharmony_ci## Overview
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5e41f4b71Sopenharmony_ci### Function
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7e41f4b71Sopenharmony_ciThe clock regulates the timing and speed of all functions in a device. For example, the CPU clock is an internal time generator of the CPU. It operates in frequency and used to synchronize and control the operations within the CPU.
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9e41f4b71Sopenharmony_ciThe **Clock** module provides APIs for clock operations, including:
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11e41f4b71Sopenharmony_ci-  Clock device management: enabling or disabling a clock device.
12e41f4b71Sopenharmony_ci-  Clock rate modulation: obtaining or setting the clock speed.
13e41f4b71Sopenharmony_ci-  Clock gating: enabling or disabling a clock.
14e41f4b71Sopenharmony_ci-  Parent-clock management: obtaining or setting the parent clock.
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16e41f4b71Sopenharmony_ci### Basic Concepts
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18e41f4b71Sopenharmony_ciThe clock signal is used to synchronize and control the operations of the modules or components of an electronic device. It serves as a fundamental signal reference source to ensure proper functioning and accurate data transmission.
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20e41f4b71Sopenharmony_ci### Working Principles
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22e41f4b71Sopenharmony_ciIn the Hardware Driver Foundation (HDF), the **Clock** module uses the unified service mode for API adaptation. In this mode, a service is used as the clock manager to handle external access requests in a unified manner. The unified service mode applies when the system has multiple device objects of the same type. If the independent service mode is used in this case, more device nodes need to be configured and more memory resources will be consumed. The **Clock** module uses the unified service mode.
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24e41f4b71Sopenharmony_ci## Usage Guidelines
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26e41f4b71Sopenharmony_ci### When to Use
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28e41f4b71Sopenharmony_ciThe **Clock** module provides chip-level clock management, including frequency division, frequency multiplication, clock source selection, and clock gating within the chip. Proper clock management can enhance chip efficiency while streamlining coordination and synergy among all functional components.
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30e41f4b71Sopenharmony_ci### Available APIs
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32e41f4b71Sopenharmony_ciThe following table describes the common APIs of the **Clock** module. For more information, see **//drivers/hdf_core/framework/include/platform/clock_if.h**.
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34e41f4b71Sopenharmony_ci**Table 1** APIs of the Clock driver
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36e41f4b71Sopenharmony_ci| API | Description  | Return Value                          | Remarks                     |
37e41f4b71Sopenharmony_ci| ---------------------------------------------------------- | ------------- | ----------------------------------- | --------------------------------------- |
38e41f4b71Sopenharmony_ci| DevHandle ClockOpen(uint32_t number);                      | Opens a clock device. | NULL: The operation fails.<br/>Device handle: The operation is successful. |                                         |
39e41f4b71Sopenharmony_ci| int32_t ClockClose(DevHandle handle);                      | Closes a clock device. | **0**: The operation is successful.<br>Other value: The operation fails. |                                         |
40e41f4b71Sopenharmony_ci| int32_t ClockEnable(DevHandle handle);                     | Enables clock.    | **0**: The operation is successful.<br>Other value: The operation fails. |                                         |
41e41f4b71Sopenharmony_ci| int32_t ClockDisable(DevHandle handle);                    | Disables clock.  | **0**: The operation is successful.<br>Other value: The operation fails. |                                         |
42e41f4b71Sopenharmony_ci| int32_t ClockSetRate(DevHandle handle, uint32_t rate);     | Sets the clock rate. | **0**: The operation is successful.<br>Other value: The operation fails. | If the operation fails, check whether the specified clock rate is supported. |
43e41f4b71Sopenharmony_ci| int32_t ClockGetRate(DevHandle handle, uint32_t *rate);    | Obtains the clock rate. | **0**: The operation is successful.<br>Other value: The operation fails. |                                         |
44e41f4b71Sopenharmony_ci| int32_t ClockSetParent(DevHandle child, DevHandle parent); | Sets the parent clock. | **0**: The operation is successful.<br>Other value: The operation fails. | When the parent clock is set repeatedly, no error will be returned. |
45e41f4b71Sopenharmony_ci| DevHandle ClockGetParent(DevHandle handle);                | Obtains the parent clock. | **0**: The operation is successful.<br>Other value: The operation fails. |                                         |
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47e41f4b71Sopenharmony_ci### How to Develop
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49e41f4b71Sopenharmony_ciThe following figure illustrates how to use the APIs provided by the **Clock** module.
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51e41f4b71Sopenharmony_ci**Figure 2** Process of using Clock APIs
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53e41f4b71Sopenharmony_ci![Process of using Clock APIs](figures/using-CLOCK-process.png) 
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55e41f4b71Sopenharmony_ci### Example
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57e41f4b71Sopenharmony_ciThe following example shows how to implement read operations on a clock device of the RK3568 development board. The hardware information is as follows:
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59e41f4b71Sopenharmony_ci-   SOC: RK3568
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61e41f4b71Sopenharmony_ciExample:
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63e41f4b71Sopenharmony_ci```c
64e41f4b71Sopenharmony_ci#include "clock_if.h"          // Header file of clock APIs
65e41f4b71Sopenharmony_ci#include "hdf_log.h"           // Header file of log APIs
66e41f4b71Sopenharmony_ci#define CLOCK_NUM 1
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68e41f4b71Sopenharmony_cistatic int32_t TestCaseClock(void)
69e41f4b71Sopenharmony_ci{
70e41f4b71Sopenharmony_ci    int ret = 0;
71e41f4b71Sopenharmony_ci    DevHandle handle = NULL;
72e41f4b71Sopenharmony_ci    DevHandle parent = NULL;
73e41f4b71Sopenharmony_ci    uint32_t rate = 0;
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75e41f4b71Sopenharmony_ci    handle = ClockOpen(CLOCK_NUM);
76e41f4b71Sopenharmony_ci    if (handle == NULL) {
77e41f4b71Sopenharmony_ci        HDF_LOGE("Failed to open CLOCK_NUM %d \n", CLOCK_NUM);
78e41f4b71Sopenharmony_ci        return HDF_FAILURE;
79e41f4b71Sopenharmony_ci    }
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81e41f4b71Sopenharmony_ci    ret = ClockEnable(handle);
82e41f4b71Sopenharmony_ci    if (ret != HDF_SUCCESS) {
83e41f4b71Sopenharmony_ci        HDF_LOGE("Failed to ClockEnable ret = %d \n",ret);
84e41f4b71Sopenharmony_ci        return ret;
85e41f4b71Sopenharmony_ci    }
86e41f4b71Sopenharmony_ci   
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88e41f4b71Sopenharmony_ci    ret = ClockGetRate(handle, &rate);
89e41f4b71Sopenharmony_ci    if (ret != HDF_SUCCESS) {
90e41f4b71Sopenharmony_ci        HDF_LOGE("Failed to ClockGetRate ret = %d \n",ret);
91e41f4b71Sopenharmony_ci        return ret;
92e41f4b71Sopenharmony_ci    }
93e41f4b71Sopenharmony_ci    
94e41f4b71Sopenharmony_ci    ret = ClockSetRate(handle, set_rate);
95e41f4b71Sopenharmony_ci    if (ret != HDF_SUCCESS) {
96e41f4b71Sopenharmony_ci        HDF_LOGE("Failed to ClockSetRate ret = %d \n",ret);
97e41f4b71Sopenharmony_ci        return ret;
98e41f4b71Sopenharmony_ci    }
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100e41f4b71Sopenharmony_ci    ret = ClockDisable(handle);
101e41f4b71Sopenharmony_ci    if (ret != HDF_SUCCESS) {
102e41f4b71Sopenharmony_ci        HDF_LOGE("Failed to ClockDisable ret = %d \n",ret);
103e41f4b71Sopenharmony_ci        return ret;
104e41f4b71Sopenharmony_ci    }
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106e41f4b71Sopenharmony_ci    parent = ClockGetParent(handle);    
107e41f4b71Sopenharmony_ci    if (parent != NULL) {
108e41f4b71Sopenharmony_ci        ret = ClockSetParent(handle, parent);
109e41f4b71Sopenharmony_ci        ClockClose(parent);
110e41f4b71Sopenharmony_ci    } else {
111e41f4b71Sopenharmony_ci        HDF_LOGE("Failed to ClockGetParent ret = %d \n",ret);
112e41f4b71Sopenharmony_ci    }
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114e41f4b71Sopenharmony_ci    ret = ClockClose(handle);
115e41f4b71Sopenharmony_ci    return ret;
116e41f4b71Sopenharmony_ci}
117e41f4b71Sopenharmony_ci```